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| 型號(hào)： | ISP1161A1BD |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 總線控制器 |
| 英文描述： | Universal Serial Bus single-chip host and device controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64 |
| 文件頁(yè)數(shù)： | 42/127頁(yè) |
| 文件大?。?/td> | 2762K |
| 代理商： | ISP1161A1BD |
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Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
42 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
No matter which method is used to wake up the HC from SUSPEND state, you must
enable the corresponding interrupt bits before the HC goes into SUSPEND state so
that the microprocessor can receive the correct interrupt request to wake up the HC.
11. The USB device controller (DC)
The Device Controller (DC) in ISP1161 originates from Philips ISP1181 USB
Full-Speed Interface Device IC. The functionality is same as ISP1181 in 16-bit bus
mode. The command and register sets are also the same. Refer also to the ISP1181
datasheet for a description of the operation of ISP1161’s DC. If there is any difference
found in ISP1181 and ISP1161 datasheet in terms of the DC’s functionality, the
ISP1161 datasheet supersedes the content in ISP1181 datasheet.
In general the DC in ISP1161 provides 16 endpoints for USB device implementation.
Each endpoint can be allocated an amount of RAM space in the on-chip Ping-Pong
Buffer RAM. Note: the Ping-Pong buffer RAM for the DC is independent of the buffer
RAM in the HC. When the buffer RAM is full, the DC will transfer the data in the buffer
RAM to the USB bus. When the buffer RAM is empty, an interrupt is generated to
notify the microprocessor to feed in the data. The transfer of data between the
microprocessor and the DC can be done in Parallel I/O (PIO) mode or in DMA mode.
11.1 DC data transfer operation
The following session explains how the DC of ISP1161 handles an IN data transfer
and an OUT data transfer. In Device mode, ISP1161 acts as a USB device: an IN
data transfer means transfer from ISP1161 to an external USB Host (through the
upstream port) and an OUT transfer means transfer from external USB Host to
ISP1161.
11.1.1
IN data transfer
The arrival of the IN token is detected by the SIE by decoding the PID.
The SIE also checks for the device number and endpoint number and verifies
whether they are ok.
If the endpoint is enabled, the SIE checks the contents of the Endpoint Status
register. If the endpoint is full, the contents of the FIFO are sent during the data
phase, else a NAK handshake is sent.
After the data phase, the SIE expects a handshake (ACK) from the host (except for
ISO endpoints).
On receiving the handshake (ACK), the SIE updates the interrupt register
contents, which in turn generates an interrupt to the microprocessor. The Last
Transaction Register (LTR) status is updated and the buffer is set to zero in the
Endpoint Status Register. If it fails to get a handshake, a timeout error is generated
and the LTR status is updated accordingly. For ISO endpoints, the interrupt and
LTR status are updated as soon as data are sent, since there is no handshake
phase.
On receiving an interrupt, the microprocessor reads the interrupt register. It will
know which endpoint has generated the interrupt and reads the contents of the
corresponding Endpoint Status register. If the buffer is empty, it fills up the buffer,
so that data can be sent by the SIE at the next IN token phase.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISP1161A1BM | Universal Serial Bus single-chip host and device controller |
| ISP1161BD | Full-speed Universal Serial Bus single-chip host and device controller |
| ISP1161BM | Full-speed Universal Serial Bus single-chip host and device controller |
| ISP1181ABS | INDUCTOR 1.0NH +-.3NH FIXED SMD |
| ISP1181A | Full-speed Universal Serial Bus peripheral controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1161A1BD,118 | 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1161A1BD,151 | 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1161A1BD,157 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1161A1BDFA | 功能描述:IC USB HOST CONTROLLER 64LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類(lèi)型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱(chēng):Q6396337A |
| ISP1161A1BD-S | 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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