參數(shù)資料
型號(hào): ISP1160BD
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Embedded Universal Serial Bus Host Controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁(yè)數(shù): 45/88頁(yè)
文件大小: 2044K
代理商: ISP1160BD
Philips Semiconductors
ISP1160
Embedded USB Host Controller
Product data
Rev. 04 — 04 July 2003
45 of 88
9397 750 11371
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
10.2.2
HcFmRemaining register (R: 0EH)
The HcFmRemaining register is a 14-bit down counter showing the bit time remaining
in the current frame.
Code (Hex): 0E —
read
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
23
22
21
20
19
18
17
16
FSMPS[7:0]
0
0
0
0
0
0
0
0
R/W
15
R/W
14
R/W
13
R/W
12
R/W
11
R/W
10
R/W
9
R/W
8
reserved
FI[13:8]
0
0
1
0
1
1
1
0
R/W
7
R/W
6
R/W
5
R/W
4
R/W
3
R/W
2
R/W
1
R/W
0
FI[7:0]
1
1
0
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 21:
Bit
31
HcFmInterval register: bit description
Symbol
Description
FIT
FrameIntervalToggle:
The HCD toggles this bit whenever it loads
a new value to FrameInterval.
FSMPS
[14:0]
Largest Data Packet Counter at the beginning of each frame. The
counter value represents the largest amount of data in bits which
can be sent or received by the HC in a single transaction at any
given time without causing a scheduling overrun. The field value is
calculated by the HCD.
-
reserved
FI[13:0]
FrameInterval:
Specifies the interval between two consecutive
SOFs in bit times. The default value is 11999. The HCD must save
the current value of this field before resetting the HC. Setting the
HostControllerReset field of the HcCommandStatus register will
cause the HC to reset this field to its default value. HCD may
choose to restore the saved value upon completing the reset
sequence.
30 to 16
FSLargestDataPacket:
Specifies a value which is loaded into the
15 to 14
13 to 0
Table 22:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcFmRemaining register: bit allocation
31
FRT
0
R
23
30
29
28
27
26
25
24
reserved
0
R
19
0
R
22
0
R
21
0
R
20
0
R
18
0
R
17
0
R
16
reserved
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
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