參數(shù)資料
型號: ISP1160
廠商: NXP Semiconductors N.V.
英文描述: Embedded Universal Serial Bus Host Controller
中文描述: 嵌入式通用串行總線主控制器
文件頁數(shù): 46/88頁
文件大小: 2044K
代理商: ISP1160
Philips Semiconductors
ISP1160
Embedded USB Host Controller
Product data
Rev. 04 — 04 July 2003
46 of 88
9397 750 11371
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
10.2.3
HcFmNumber register (R: 0FH)
The HcFmNumber register is a 16-bit counter. It provides a timing reference for
events happening in the HC and the HCD. The HCD may use the 16-bit value
specified in this register and generate a 32-bit frame number without requiring
frequent access to the register.
Code (Hex): 0F —
read
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
15
14
13
12
11
10
9
8
reserved
FR[13:8]
0
R
7
0
R
6
0
R
5
0
R
4
0
R
3
0
R
2
0
R
1
0
R
0
FR[7:0]
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
Table 23:
Bit
31
HcFmRemaining register: bit description
Symbol
Description
FRT
FrameRemainingToggle:
This bit is loaded from the
FrameIntervalToggle field of the HcFmInterval register whenever
FrameRemaining reaches 0. This bit is used by the HCD for
synchronization between FrameInterval and FrameRemaining.
-
reserved
FR[13:0]
FrameRemaining:
This counter is decremented at each bit time.
When it reaches zero, it is reset by loading the FrameInterval value
specified in the HcFmInterval register at the next bit time boundary.
When entering the USBOperational state, the HC reloads it with
the content of the FrameInterval part of the HcFmInterval register
and uses the updated value from the next SOF.
30 to 14
13 to 0
Table 24:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcFmNumber register: bit allocation
31
30
29
28
27
26
25
24
reserved
0
R
23
0
R
22
0
R
21
0
R
20
0
R
19
0
R
18
0
R
17
0
R
16
reserved
0
R
15
0
R
14
0
R
13
0
R
12
0
R
11
0
R
10
0
R
9
0
R
8
FN[15:8]
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
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