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參數(shù)資料
| 型號： | IS80C88-2 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CMOS 8/16-Bit Microprocessor |
| 中文描述： | 16-BIT, 8 MHz, MICROPROCESSOR, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 29/32頁 |
| 文件大?。?/td> | 246K |
| 代理商： | IS80C88-2 |
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3-29
Immediate to Register/Memory
1 0 0 0 0 0 s w
mod 0 1 0 r/m
data
data if s:w = 01
Immediate to Accumulator
0 0 0 1 0 1 0 w
data
data if w = 1
INC = Increment:
Register/Memory
1 1 1 1 1 1 1 w
mod 0 0 0 r/m
Register
0 1 0 0 0 reg
AAA =
ASCll Adjust for Add
0 0 1 1 0 1 1 1
DAA =
Decimal Adjust for Add
0 0 1 0 0 1 1 1
SUB =
Subtract:
Register/Memory and Register to Either
0 0 1 0 1 0 d w
mod reg r/m
Immediate from Register/Memory
1 0 0 0 0 0 s w
mod 1 0 1 r/m
data
data if s:w = 01
Immediate from Accumulator
0 0 1 0 1 1 0 w
data
data if w = 1
SBB = Subtract with Borrow
Register/Memory and Register to Either
0 0 0 1 1 0 d w
mod reg r/m
Immediate from Register/Memory
1 0 0 0 0 0 s w
mod 0 1 1 r/m
data
data if s:w = 01
Immediate from Accumulator
0 0 0 1 1 1 0 w
data
data if w = 1
DEC = Decrement:
Register/Memory
1 1 1 1 1 1 1 w
mod 0 0 1 r/m
Register
0 1 0 0 1 reg
NEG = Change Sign
1 1 1 1 0 1 1 w
mod 0 1 1 r/m
CMP = Compare:
Register/Memory and Register
0 0 1 1 1 0 d w
mod reg r/m
Immediate with Register/Memory
1 0 0 0 0 0 s w
mod 1 1 1 r/m
data
data if s:w = 01
Immediate with Accumulator
0 0 1 1 1 1 0 w
data
data if w = 1
AAS =
ASCll Adjust for Subtract
0 0 1 1 1 1 1 1
DAS =
Decimal Adjust for Subtract
0 0 1 0 1 1 1 1
MUL =
Multiply (Unsigned)
1 1 1 1 0 1 1 w
mod 1 0 0 r/m
IMUL =
Integer Multiply (Signed)
1 1 1 1 0 1 1 w
mod 1 0 1 r/m
AAM =
ASCll Adjust for Multiply
1 1 0 1 0 1 0 0
0 0 0 0 1 0 1 0
DlV =
Divide (Unsigned)
1 1 1 1 0 1 1 w
mod 1 1 0 r/m
IDlV =
Integer Divide (Signed)
1 1 1 1 0 1 1 w
mod 1 1 1 r/m
AAD =
ASClI Adjust for Divide
1 1 0 1 0 1 0 1
0 0 0 0 1 0 1 0
CBW =
Convert Byte to Word
1 0 0 1 1 0 0 0
CWD =
Convert Word to Double Word
1 0 0 1 1 0 0 1
LOGIC
NOT = Invert
1 1 1 1 0 1 1 w
mod 0 1 0 r/m
SHL/SAL =
Shift Logical/Arithmetic Left
1 1 0 1 0 0 v w
mod 1 0 0 r/m
SHR =
Shift Logical Right
1 1 0 1 0 0 v w
mod 1 0 1 r/m
SAR =
Shift Arithmetic Right
1 1 0 1 0 0 v w
mod 1 1 1 r/m
ROL =
Rotate Left
1 1 0 1 0 0 v w
mod 0 0 0 r/m
ROR =
Rotate Right
1 1 0 1 0 0 v w
mod 0 0 1 r/m
RCL =
Rotate Through Carry Flag Left
1 1 0 1 0 0 v w
mod 0 1 0 r/m
Instruction Set Summary
(Continued)
MNEMONIC AND DESCRIPTION
INSTRUCTION CODE
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
80C88
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