參數(shù)資料
型號: IS42S81600A-7TI
英文描述: 16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM
中文描述: 16Meg × 8,8Meg x16
文件頁數(shù): 51/65頁
文件大?。?/td> 556K
代理商: IS42S81600A-7TI
56
XMEGA C3 [DATASHEET]
8361D–AVR–07/2013
32.
Peripheral Module Address Map
The address maps show the base address for each peripheral and module in Atmel AVR XMEGA C3. For complete
register description and summary for each peripheral module, refer to the XMEGA C manual.
Table 32-1. Peripheral module address map.
Base address
Name
Description
0x0000
GPIO
General Purpose IO Registers
0x0010
VPORT0
Virtual Port 0
0x0014
VPORT1
Virtual Port 1
0x0018
VPORT2
Virtual Port 2
0x001C
VPORT3
Virtual Port 2
0x0030
CPU
0x0040
CLK
Clock Control
0x0048
SLEEP
Sleep Controller
0x0050
OSC
Oscillator Control
0x0060
DFLLRC32M
DFLL for the 32 MHz Internal RC Oscillator
0x0068
DFLLRC2M
DFLL for the 2 MHz RC Oscillator
0x0070
PR
Power Reduction
0x0078
RST
Reset Controller
0x0080
WDT
Watch-Dog Timer
0x0090
MCU
MCU Control
0x00A0
PMIC
Programmable MUltilevel Interrupt Controller
0x00B0
PORTCFG
Port Configuration
0x0180
EVSYS
Event System
0x00C0
AES
AES Module
0x00D0
CRC
CRC Module
0x0100
DMA
DMA Controller
0x01C0
NVM
Non Volatile Memory (NVM) Controller
0x0200
ADCA
Analog to Digital Converter on port A
0x0380
ACA
Analog Comparator pair on port A
0x0400
RTC
Real Time Counter
0x0480
TWIC
Two Wire Interface on port C
0x04C0
USB
Universal Serial Bus Interface
0x04A0
TWIE
Two Wire Interface on port E
0x0600
PORTA
Port A
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