參數(shù)資料
型號: IPM6220CA
廠商: INTERSIL CORP
元件分類: 穩(wěn)壓器
英文描述: Advanced Triple PWM and Dual Linear Power Controller for Portable
中文描述: SWITCHING CONTROLLER, 345 kHz SWITCHING FREQ-MAX, PDSO24
封裝: PLASTIC, SSOP-24
文件頁數(shù): 13/14頁
文件大?。?/td> 358K
代理商: IPM6220CA
13
power plane should support the input power and output power
nodes. Use copper filled polygons on the top and bottom
circuit layers for the phase nodes, but do not unnecessarily
oversize these particular islands. Since the phase nodes are
subjected to very high dV/dt voltages, the stray capacitor
formed between these islands and the surrounding circuitry
will tend to couple switching noise. Use the remaining printed
circuit layers for small signal wiring. The wiring traces from the
control IC to the MOSFET gate and source should be sized to
carry 2A peak currents.
Small Components Signal Layout Considerations
4. The VSNS1 and VSNS2 inputs should be bypassed with
a 1.0
μ
F capacitor close to their respective IC pins.
5. A ‘T’ filter consisting of a ‘split’ RSNS and a small, 100pF,
capacitor as shown in Figure 10, may be helpful in
reducing noise coupling into the ISEN input. For example,
if the calculated value of RSNS1 is 2.2k
, dividing it as
shown with a 100pF capacitor provides filtering without
changing the current limit set point. For any calculated
value of RSNS, keep the value of the R9 portion to
approximately 200
, and the remainder of the resistance
in the R19 position. The 200
resistor and 100pF
capacitor provide effective filtering for noise above 8MHz.
This filter configuration may be helpful on both the 3.3V and
5V Main outputs.
6. The bypass capacitors for VBATT and the soft-start
capacitors, C
SS1
and C
SS2
should be located close to
their connecting pins on the control IC. Minimize any
leakage current paths from SDWN1 and SDWN2 nodes,
since the internal current source is only 5
μ
A.
7. Refer to the Application Note AN9915 for a recommended
component placement and interconnections.
Figure 11 shows an application circuit of a power supply for a
notebook PC microprocessor system. The power supply
provides +5V ALWAYS, +3.3V ALWAYS, +5.0V, +3.3V, and
12V from +5.6-22V
DC
battery voltage. For detailed information
on the circuit, including a Bill of Materials and circuit board
description, see Application Note AN9915. Also see Intersil’s
web site (www.intersil.com) for the latest information.
ISEN1
R19
2K
R9
200
C12
100pF
FROM PHASE
NODE
RSNS = R19 + R9
FIGURE 10. NOISE FILTER FOR ISEN1 INPUT
SDWNALL
GND
+5.6-22V
IN
PGND1
LGATE1
UGATE1
ISEN1
PHASE1
Q3
HUF76112SK8
Q5
HUF76112SK8
+3.3V
(5A)
VSEN2
UGATE2
PHASE2
Q2
C1
100
μ
F
IPM6220
L2
+
+
+
C4
C3, 6, 10
3x1
μ
F
R9, 19
+5V
(5A)
C22
330
μ
F
L1
HUF76112SK8
56
μ
F
2x330
μ
F
2.2K
8.2
μ
H
8.2
μ
H
GND
4
5
10
2
6
1
21
23
22
20
19
17
13
14
C9
0.15
μ
F
BOOT1
PGND2
LGATE2
Q4
HUF76112SK8
7
8
ISEN2
R10, 11
2.2K
9
C7
0.15
μ
F
BOOT2
VBATT
+
3.3V ALWAYS
(50mA)
3.3V ALWAYS
5V ALWAYS
11
SDWN2
C21, 32
D2
D1
24
3
BAT54WT1
+5V ALWAYS
(50mA)
C2
10
μ
F
+
0.022
μ
F
12
PGOOD
18
SDWN1
0.022
μ
F
C17
16
L4
2.7
μ
H
C16
Q5
+
15
VSEN3
GATE3
VSEN1
HUF76112SK8
C24, 33
2x47
μ
F
D3
R14
97.6K
24.9K
R13
BAT54WT1
+
L3
6.8
μ
H
22
μ
F
C36
FIGURE 11. APPLICATIONS CIRCUIT
+12V
(120mA)
IPM6220
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