
12
+12V Boost Converter Inductor Selection
The inductor value is chosen to provide the required output
power to the load.
where, Vinmin is the minimum input voltage, 4.9V; Dmax =
1/3, the maximum duty cycle; Ro is the minimum load
resistance; Vo is the nominal output voltage and F is the
switching frequency, 100kHz.
+12V Boost Converter Output Capacitor Selection
The total capacitance on the 12V output should be chosen
appropriately, so that the output voltage will be higher than
the undervoltage limit (9V) when the 5V Main soft-start time
has elapsed. This will avoid triggering of the 12V
undervoltage protection.
The maximum value of the boost capacitor, Comax that will
charge to 9V in the soft start time, Tss is shown below,
where L is the value of the boost inductor.
The output capacitor ESR and the boost inductor ripple
current determines the output voltage ripple. The ripple
voltage is given by:
and the maximum ripple current,
I
L,
is given by:
where L is the boost inductor calculated above, 5V is the
boost input voltage and 3.3
μ
is the maximum on time for the
boost MOSFET.
MOSFET Considerations
The logic level MOSFETs are chosen for optimum efficiency
given the potentially wide input voltage range and output
power requirements. Two N-channel MOSFETs are used in
each of the synchronous-rectified buck converters for the
PWM1 and PWM2 outputs. These MOSFETs should be
selected based upon r
DS(ON)
, gate supply requirements,
and thermal management considerations.
The power dissipation includes two loss components;
conduction loss and switching loss. These losses are
distributed between the upper and lower MOSFETs
according to duty cycle (see the following equations). The
conduction losses are the main component of power
dissipation for the lower MOSFETs. Only the upper
MOSFET has significant switching losses, since the lower
device turns on and off into near zero voltage.
The equations assume linear voltage-current transitions and
do not model power loss due to the reverse-recovery of the
lower MOSFET’s body diode. The gate-charge losses are
dissipated by the IPM6220 and do not heat the MOSFETs.
However, a large gate-charge increases the switching time,
t
SW
which increases the upper MOSFET switching losses.
Ensure that both MOSFETs are within their maximum
junction temperature at high ambient temperature by
calculating the temperature rise according to package
thermal-resistance specifications.
Layout Considerations
MOSFETs switch very fast and efficiently. The speed with
which the current transitions from one device to another
causes voltage spikes across the interconnecting impedances
and parasitic circuit elements. The voltage spikes can
degrade efficiency, radiate noise into the circuit, and lead to
device overvoltage stress. Careful component layout and
printed circuit design minimizes the voltage spikes in the
converter. Consider, as an example, the turn-off transition of
one of the upper PWM MOSFETs. Prior to turn-off, the upper
MOSFET is carrying the full load current. During the turn-off,
current stops flowing in the upper MOSFET and is picked up
by the lower MOSFET. Any inductance in the switched current
path generates a voltage spike during the switching interval.
Careful component selection, tight layout of the critical
components, and short, wide circuit traces minimize the
magnitude of voltage spikes. See the Application Note
AN9915 for the evaluation board component placement and
the printed circuit board layout details.
There are two sets of critical components in a DC-DC
converter using an IPM6220 controller. The switching power
components are the most critical because they switch large
amounts of energy, and as such, they tend to generate
equally large amounts of noise. The critical small signal
components are those connected to sensitive nodes or
those supplying critical bias currents.
Power Components Layout Considerations
The power components and the controller IC should be
placed first. Locate the input capacitors, especially the high-
frequency ceramic decoupling capacitors, close to the power
MOSFETs. Locate the output inductor and output capacitors
between the MOSFETs and the load. Locate the PWM
controller close to the MOSFETs.
Insure the current paths from the input capacitors to the
MOSFETs, to the output inductors and output capacitors are
as short as possible with maximum allowable trace widths.
A multi-layer printed circuit board is recommended. Dedicate
one solid layer for a ground plane and make all critical
component ground connections with vias to this layer.
Dedicate another solid layer as a power plane and break this
plane into smaller islands of common voltage levels. The
Lmax
2
----------------------------------------------------------------
2
Vo
2
×
F
×
=
Comax
---------
0.115
μ
F
×
=
V
RIPPLE
IL
ESR
×
=
IL
-------
3.3
×
μ
=
P
UPPER
I
------------------------------------------------------------
2
r
IN
r
×
V
×
I
----------------------------------------------------
V
×
t
×
F
S
×
+
=
P
LOWER
I
--------------------------------------------------------------------------------
2
IN
×
V
V
–
(
)
×
=
IPM6220