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| 型號： | IMISG577CYB |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 166K |
| 代理商： | IMISG577CYB |
SG577C
Low EMI Clock Generator for Pentium II Systems with Power
Management
Approved Product
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
Rev 2.0
8/12/98
MILPITAS, CA 95035 TEL: 408-263-6300 ext. 275 FAX 408-263-6571
Page 4 of 10
Power Management Timing
Latency
Signal
Signal State
No. of rising edges of free
running PCICLK (PCIF)
CSTOP
0 (disabled)
1
1 (enabled)
1
PSTOP
0 (disabled)
1
1 (enabled)
1
PD
1 (normal operation)
3 mS
0 (power down)
2 mS max.
NOTES:
1.
Clock on/off latency is defined in the number of rising edges of free running PCICLKs between the clock disable
goes low/high to the first valid clock comes out of the device.
2.
Power up latency is when PWR_DWN# goes inactive (high) to when the first valid clocks are driven from the device.
SPECTRUM SPREAD CLOCKING
Spectrum Analysis
Center
Frequency(MHz)
Amplitude
(dB)
Without Spectrum Spread
With Spectrum Spread
Down Spread
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