- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄65600 > IMISG577CYB PROC SPECIFIC CLOCK GENERATOR, PDSO48 PDF資料下載
參數(shù)資料
| 型號(hào)： | IMISG577CYB |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 166K |
| 代理商： | IMISG577CYB |
SG577C
Low EMI Clock Generator for Pentium II Systems with Power
Management
Approved Product
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
Rev 2.0
8/12/98
MILPITAS, CA 95035 TEL: 408-263-6300 ext. 275 FAX 408-263-6571
Page 2 of 10
PIN DESCRIPTION
PIN
No.
Pin
Name
PWR
I/O
TYPE
Description
4
Xin
VDD
I
OSC1
On-chip reference oscillator input pin. Requires either an
external parallel resonant crystal (nominally 14.318 MHz) or
externally generated reference signal
5
Xout
VDD
O
OSC1
O-chip reference oscillator output pin. Drives an external parallel
resonant crystal when an externally generated reference signal
is used, is left unconnected
25, 26,
27
FS(0:2)
-
I
PAD
PU
Frequency select input pins. See frequency select table on page
1. These pin has an internal pull-up
40, 39,
36, 35
CPU(1:4)
VDDC
O
BUF1
Clock outputs. CPU frequency table specified on page 1.
45, 44
IOAPIC(1:2)
VDDI
O
BUF2
IOAPIC clock for multi processor support. Fixed frequency at
14.31818 MHz. (2.5 or 3.3 supply = VDDI)
8, 10,
11, 13,
14, 16,
17
PCI(1:7)
VDDP
O
BUF4
PCI bus clocks. See frequency select table on page 1.
7
PCI_F
VDDP
O
BUF4
PCI clock that ceases only when PD (pin 29) is ascerted. See
frequency select table on page 1.
3, 6,
12, 18,
20, 24,
32, 34,
38, 43
VSS
-
P
-
Ground pins for the device.
46
VDDI
-
P
-
3.3 or 2.5 Volt power supply pins for IOAPIC clock output
buffers.
9, 15
VDDP
-
P
-
3.3 Volt power supply pins for PCI and PCI_F clock output
buffers.
21
VDDF
-
P
-
3.3 Volt power supply pins for 48 MHz clock output buffers.
48
VDDR
-
P
3.3 Volt power supply pins for reference clock output buffers.
37, 41
VDDC
-
P
-
3.3 or 2.5 Volt power supply pins for CPU clock output buffers.
19, 33
VDD
Power supply pins for analog circuits and core logic
1, 2, 47
REF(1:3)
VDDR
O
BUF3
Buffered outputs of on-chip reference oscillator.
22, 23
48M(1:2)
VDDF
O
BUF3
Fixed 48 MHz frequency clock outputs.
31
PSTOP
-
I
PAD
PU
When driven to a logic low level, this pin will synchronously stop
all PCI clocks (except PCI_F) at a logic low level.
30
CSTOP
-
I
PAD
PU
When driven to a logic low level, this pin will synchronously stop
all CPU clocks at a logic low level.
28
#SSM
-
I
PAD
PU
When driven to a logic low level this pin enables EMI reducing
Spread Spectrum mode (affects only CPU and PCI clocks).
29
PD
-
I
PAD
PU
When this pin is driven to a logic low the IC will enter shutdown
mode and ALL internal circuitry is turned off.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IMIZ9104DAB | PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| IMSG300G-11C | 1280 X 1024 PIXELS CRT GRPH DSPL CTLR, CPGA84 |
| IMSG300G-85C | 1280 X 1024 PIXELS CRT GRPH DSPL CTLR, CPGA84 |
| IR26-21C/L110/TR8 | 1.6 mm, 1 ELEMENT, INFRARED LED, 940 nm |
| IR333/H0/L10 | 5 mm, 1 ELEMENT, INFRARED LED, 940 nm |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IMISG745BYB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU System Clock Generator |
| IMISG748CYB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU System Clock Generator |
| IMISG750CYB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU System Clock Generator |
| IMISM530ATB | 制造商:Cypress Semiconductor 功能描述:LOW EMI SPREAD SPECTRUM CLOCK 制造商:Rochester Electronics LLC 功能描述:CLOC - Bulk |
| IMISM530ATBT | 制造商:Cypress Semiconductor 功能描述:LOW EMI SPREAD SPECTRUM CLOCK |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。