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參數(shù)資料
| 型號： | IDT88P8342BHI |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 43/98頁 |
| 文件大小： | 0K |
| 描述： | IC SPI3-SPI4 EXCHANGE 820-PBGA |
| 標準包裝： | 24 |
| 系列： | * |
| 其它名稱： | 88P8342BHI |
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48
IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
Block_base
Function
0x0000
SPI-4 ingress LP to LID tables
0x0100
SPI-4 ingress calendar_0
0x0200
SPI-4 ingress calendar_1
0x0300
SPI-4 ingress registers
0x0400
SPI-4 egress LID to LP map
0x0500
SPI-4 egress calendar_0
0x0600
SPI-4 egress calendar_1
0x0700
SPI-4 egress configuration and status registers
0x0800
SPI-4 ingress timing block registers
0x0900
PMON timebase control, clock generator control, GPIO register, and version number
TABLE 24 - INDIRECT ACCESS BLOCK BASES FOR COMMON MODULE
Register offset
The register offset is shown in the section where the register is defined. The
register offset is referred to as, “Register_offset”, in this document. A register
reference takes the form of, “[Register_offset 0xHH]”, where HH is the
hexadecimal value of the register offset.
Indirect register access
Indirect register write access
An indirect write access is initiated by first checking for IND_BUSY=0 in the
indirectaccesscontrolregister,andthenwritingdataintotheindirectaccessdata
registers.Next,theaddressiswrittenintotheindirectaccessaddressregisters.
Then, 0x00 is written into the indirect access control register. The status of the
IND_BUSY flag in the indirect access control register is checked to ensure the
process has completed before another indirect access can be initiated.
Indirect register read access
An indirect read access is initiated by first checking for IND_BUSY=0 in the
indirect access control register, and then writing the address into the indirect
access address registers. Then, 0x40 is written into the indirect access control
register.ThestatusoftheIND_BUSYflagintheindirectaccesscontrolregister
ischeckedtoensuretheprocesshascompleted,andthendataisreadoutfrom
the indirect access data registers.
The registers for controlling indirect register access are shown below. The
registersforcontrollingindirectregisteraccessaredirectlyaccessiblewithread
and write access.
TABLE 25 - INDIRECT ACCESS DATA REGISTERS
(DIRECT ACCESSED SPACE) AT 0x30 to 0x33
Field
Bits
Length
Function
DATA[7:0]
7:0
8
Indirect Data Register 0x30
DATA[15:8]
15:8
8
Indirect Data Register 0x31
DATA[23:16]
23:16
8
Indirect Data Register 0x32
DATA[31:24]
31:24
8
Indirect Data Register 0x33
TABLE 26 - INDIRECT ACCESS ADDRESS REGISTER
(DIRECT ACCESSED SPACE) AT 0x34 to 0x35
Field
Bits
Length
Function
ADDRESS[7:0]
7:0
8
Indirect Low Address Register 0x34
ADDRESS[15:8]
15:8
8
Indirect High Address Register 0x35
TABLE 27 - INDIRECT ACCESS CONTROL REGISTER
(DIRECT ACCESSED SPACE) AT 0x3F
Field
Bits
Length
ERROR code
5:0
6
R/WN
6
1
IND_BUSY
7
1
The fields for this register are defined below.
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PDF描述 |
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| IDT88P8344BHI | IC SPI3-SPI4 EXCHANGE 820-PBGA |
| IDT89H24NT24G2ZBHLG | IC PCI SW 24LANE 24PORT 324BGA |
| IDT89HPES16NT2ZBBCG | IC PCI SW 16LANE 2PORT 484-CABGA |
| IDT89HPES24NT3ZBBXG | IC PCI SW 24LANE 3PORT 420-SBGA |
| IDT89HPES32T8ZHBXG | IC PCI SW 32LANE 8PORT 500-SBGA |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| IDT88P8344 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 |
| IDT88P8344BHGI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:* 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調幀器 應用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT88P8344BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:* 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調幀器 應用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT89H10T4BG2ZBBC | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
| IDT89H10T4BG2ZBBC8 | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
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