參數(shù)資料
型號: IDT88P8341BHGI
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 78/96頁
文件大?。?/td> 0K
描述: IC SPI3-SPI4 EXCHANGE 820-PBGA
標準包裝: 24
系列: *
其它名稱: 88P8341BHGI
8
IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
TYPICAL APPLICATION
Exchange between optical ports and NPU/Traffic Manager
Figure 2. Data Path Diagram
Figure 1. Typical application: optical port and NPU/Traffic Manager
SPI-3
SPI-3 ingress to SPI-4 egress
I/F
Memory
I/F
SPI-4
SPI-4 ingress to SPI-3 egress
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1. INTRODUCTION
The IDT88P8341 device is a SPI-3 to SPI-4 exchange intended for use
in optical line cards, Ethernet transport, and multi-service switches. The SPI-
3 and SPI-4 interfaces are defined by the Optical Interworking Forum.
The device can be used as a rate adapter, a switch, or an aggregation
devicebetweennetworkprocessorunits,multi-gigabitframersandPHYs,and
switch fabric interface devices.
DATA PATH OVERVIEW
Figure 1. Data Path Diagram shows an overview of the data path through
the device.
In normal operation, there are two paths through the IDT88P8341 device:
the SPI-3 ingress to SPI-4 egress path, and the SPI-4 ingress to SPI-3 egress
path. SPI-3 and SPI-4 burst sizes are separately configurable.
In the SPI-3 ingress to SPI-4 egress path, data enter in fragments on the SPI-
3 interface and are received by the SPI-3 interface block. The fragments are
mapped to a SPI-4 address and stored in memory allocated at the SPI-3 level
untilsuchatimethatthePacketFragmentProcessordeterminesthattheyareto
betransmittedontheSPI-4interface.Thedataistransferredinbursts,inlinewith
the OIF SPI-4 implementation agreement, to the SPI-4 interface block, and are
transmitted on the SPI-4 interface.
In the SPI-4 ingress to SPI-3 egress path, data enter in bursts on the SPI-4
interface and are received by the SPI-4 interface block. The SPI-4 address is
translated to a SPI-3 address, and the data contained in the bursts are stored
inmemoryallocatedattheSPI-3leveluntilsuchatimethatthePacketFragment
ProcessordeterminesthattheyaretobetransmittedontheSPI-3interface.The
dataistransferredinpacketfragments,inlinewiththeOIFSPI-3implementation
agreement, to the SPI-3 interface block, and are transmitted on the SPI-3
interface.
Multi-Rate
SONET
Framer
SPI-3
IDT88P8341
NPU
SPI-4
Control
Processor
OC-48/
4xOC-12/
16xOC-3
PCI
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