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參數(shù)資料
| 型號： | IDT82P2916BFG |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 72/138頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU T1/E1/J1 16CH SH 484BGA |
| 標(biāo)準(zhǔn)包裝： | 84 |
| 功能： | 線路接口單元（LIU） |
| 接口： | E1，J1，T1 |
| 電路數(shù)： | 16 |
| 電源電壓： | 1.8V, 3.3V |
| 功率（瓦特）： | 3.10W |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 484-LFBGA |
| 供應(yīng)商設(shè)備封裝： | 484-CABGA（19x19） |
| 包裝： | 托盤 |
| 包括： | AIS 警報(bào)檢測器和發(fā)生器，回送功能，PRBS 發(fā)生器 / 檢測器，遠(yuǎn)程檢測器和發(fā)生器 |
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IDT82P2916
16-CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Functional Description
39
April 24, 2010
3.5.3.3 Transmit LOS (TLOS)
The amplitude and density of the data output on the transmit line side
are monitored. When the amplitude of the data is less than a certain
voltage for a certain period, TLOS is declared. The voltage is defined by
the TALOS[1:0] bits (b3~2, LOS,...). The period is defined by the
TDLOS[1:0] bits (b1~0, LOS,...). When a valid pulse is detected, i.e., the
amplitude is above the setting in the TALOS[1:0] bits (b3~2, LOS,...),
TLOS is cleared.
When TLOS is detected, the TLOS_S bit (b2, STAT0,...) will be set. A
transition from ‘0’ to ‘1’ on the TLOS_S bit (b2, STAT0,...) or any transi-
tion (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the TLOS_S bit (b2, STAT0,...) will
set the TLOS_IS bit (b2, INTS0,...) to ‘1’, as selected by the TLOS_IES
bit (b2, INTES,...). When the TLOS_IS bit (b2, INTS0,...) is ‘1’, an inter-
rupt will be reported by INT if not masked by the TLOS_IM bit (b2,
TLOS may be counted by an internal Error Counter or may be indi-
cated by the TMFn pin. Refer to Section 3.5.6 Error Counter and
Section 3.5.7.2 TMFn Indication respectively.
TLOS can be used to monitor the LOS in the transmit line side
between two channels. The connection between the two channels is
shown in Figure-21. The two channels can be of the same device or
different devices on the premises that the transmit line interfaces are in
the same mode and at least the output of one channel is in High-Z state.
Table-19 lists each results in this case. In the left two columns, the OE
bit (b6, TCF0,...) of the two channels controls the output status in the
transmit line side to ensure that at least one channel is in High-Z state.
The middle two columns list the internal operation status. In the right two
columns, the TLOS_S bit (b2, STAT0,...) of the two channels indicates
the TLOS status in the transmit line side.
Figure-21 TLOS Detection Between Two Channels
Line
Driver
TLOS
Line
Driver
TLOS
TTIPn
TRINGn
TTIPn
TRINGn
Channel #1
Channel #2
TLOS
Detector
TLOS
Detector
Table-19 TLOS Detection Between Two Channels
Output Status ~ Controlled By the OE Bit
Internal Operation Status
TLOS Status ~ Indicated By the TLOS_S Bit
Channel #1
Channel #2
Channel #1
Channel #2
Channel #1
Channel #2
Normal ~ 1
High-Z ~ 0
Normal
(don’t-care)
No TLOS ~ 0
Normal ~ 1
High-Z ~ 0
Failure
Normal
TLOS Detected ~ 1 *
TLOS Detected ~ 1
High-Z ~ 0
Normal ~ 1
(don’t-care)
Normal
No TLOS ~ 0
High-Z ~ 0
Normal ~ 1
Normal
Failure
TLOS Detected ~ 1
TLOS Detected ~ 1 *
High-Z ~ 0
(don’t-care)
TLOS Detected ~ 1
Note:
* The TLOS_S bit (b2, STAT0,...) may not be set if there is any catastrophic failure in the channel.
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參數(shù)描述 |
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| IDT82P2916BFG8 | 制造商:Integrated Device Technology Inc 功能描述:IC LIU T1/E1/J1 16CH SH 484BGA |
| IDT82P5088 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Universal Octal T1/E1/J1 LIU with Integrated Clock Adapter |
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| IDT82P5088BBG8 | 制造商:Integrated Device Technology Inc 功能描述:IC LIU T1/E1/J1 OCTAL 256PBGA |
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