參數(shù)資料
型號： IDT82P2828BH
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 123/154頁
文件大小： 0K
描述： IC LIU T1/J1/E1 28+1CH 640-PBGA
標(biāo)準(zhǔn)包裝： 5
類型： 線路接口裝置（LIU）
規(guī)程： E1
電源電壓： 3.13 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 640-BGA 裸露焊盤
供應(yīng)商設(shè)備封裝： 640-PBGA-EP（31x31）
包裝： 托盤
其它名稱： 82P2828BH
IDT82P2828
28(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Miscellaneous
70
February 6, 2009
4
MISCELLANEOUS
4.1
RESET
The reset operation resets all registers, state machines as well as I/O
pins to their default value or status.
The IDT82P2828 provides 4 kinds of reset:
Power-on reset;
Hardware reset;
Global software reset;
Per-channel software reset.
The Power-on, Hardware and Global software reset operations reset
all the common blocks (including clock generator/synthesizer and micro-
processor interface) and channel-related parts. The Per-channel soft-
ware reset operation resets the channel-related parts. Figure-46 shows
a general overview of the reset options.
During reset, all the line interface pins (i.e., TTIPn/TRINGn and
RTIPn/RRINGn) are in High-Z state.
After reset, all the items listed in Table-26 are true.
Figure-46 Reset
clock generator/
synthesizer
microprocessor
interface
channel
Hardware reset Global software reset
Power-on reset
Per-channel software reset
Table-26 After Reset Effect Summary
Effect On ...
Power-On Reset, Hardware Reset and Global Software Reset
Per-Channel Software Reset
TTIPn/TRINGn & RTIPn/
RRINGn
All TTIPn/TRINGn & RTIPn/RRINGn pins are in High-Z state.
Only TTIPn/TRINGn & RTIPn/RRINGn in the corresponding chan-
nel are in High-Z.
Line Interface Mode
All channels are reset to T1/J1 mode.
Only the corresponding channel is reset to T1/J1 mode.
System interface
All channels are in Dual Rail NRZ Format.
Only the corresponding channel is in Dual Rail NRZ Format.
General I/O pins (i.e.,
D[7:0] and GPIO[1:0])
As input pins.
(No effect)
INT
Open drain output.
(No effect)
CLKT1, CLKE1, REFA,
REFB
Output enable.
(No effect)
LLOS, LLOS0
Output enable.
(No effect)
TDO, SDO/ACK/RDY
High-Z.
(No effect)
state machines
All state machines are reset.
The state machines in the corresponding channel are reset.
Interrupt sources
All interrupt sources are masked.
The interrupt sources in the corresponding channel are masked.
Registers
All registers are reset to their default value.
The registers in the corresponding channel are reset to their
default value except that there is no effect on the T1E1 bit.
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