參數(shù)資料
型號: ICS1894KI-32LFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 18/50頁
文件大?。?/td> 0K
描述: PHYCEIVER LOW PWR 3.3V 32QFN
標(biāo)準包裝: 1
系列: PHYceiver™
類型: PHY 收發(fā)器
規(guī)程: MII,RMII
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-VFQFPN 裸露焊盤(4x4)
包裝: 標(biāo)準包裝
其它名稱: 800-2030-6
ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PHYCEIVER
IDT 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
25
ICS1894-32
REV M 021512
20.11
ICS reserved
Reserved
RW
1
F
20.10
1
20.9
1
20.8
ICS reserved
Reserved
RW
1
20.7
1
E
20.6
1
20.5
LED1 Mode
000 = Link Integrity
001 = activity/no activity
010 = Transmit Data
011 = Receive Data
100 = Collision
101 = 100/10 mode (Default LED1)
110 = Full Duplex
111 = OFF
RW
1
20.4
0
20.3
1
9
20.2
LED0 Mode
000 = Link Integrity
001 = activity/no activity (Default LED0)
010 = Transmit Data
011 = Receive Data
100 = Collision
101 = 100/10 mode
110 = Full Duplex
111 = LINK_STAT
RW
0
20.1
0
20.0
1
Register
21 - Extended Control Register
21.15:0
RXER_CNT
Receive error count for RMII mode
RW
0
Register
22 - Extended Control Register
22.15
Interrupt output enable
Disable interrupt output
Enable interrupt output
RW
0
22.14
Interrupt flag read clear
enable
Interrupt flag clear by
read disable
Interrupt flag clear by read
enable
RW
0
22.13
Interrupt polarity
Output low when
interrupt occur
Output high when
interrupt occur
RW
0
22.12
Interrupt flag auto clear
enable
Interrupt flag unchanged
when interrupt condition
removed
Interrupt flag cleared
when interrupt condition
removed
RW
0
22.11
Interrupt flag re-setup
enable
Interrupt flag always
cleared when write 1 to
flag bit
Interrupt flag remains
unchanged when
interrupt condition exists
when a 1 is written to flag
bit.
RW
0
22.10
Interrupt Enable
Disable Deep power
down wake up Interrupt
Enable Deep power down
wake up Interrupt
RW
0
22.9
Interrupt Enable
Disable Deep power
down Interrupt
Enable Deep power down
Interrupt
RW
0
22.8
Interrupt Enable
Disable Auto-Negotiation
Complete Interrupt
Enable Auto-Negotiation
Complete Interrupt
RW
0
Bit
Definition
When Bit = 0
When Bit = 1
Access 2
SF2
Default3
Hex
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