參數(shù)資料
型號(hào): IBMN364804CT3C-260
英文描述: x8 SDRAM
中文描述: x8 SDRAM內(nèi)存
文件頁數(shù): 32/71頁
文件大?。?/td> 1251K
代理商: IBMN364804CT3C-260
IBMN364164
IBMN364404
64Mb Synchronous DRAM - Die Revision C
IBMN364804
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 32 of 71
19L3265.E35856B
1/01
Clock Enable (CKE) Truth Table
Current State
CKE
Command
Action
Notes
Previous
Cycle
Current
Cycle
CS
RAS
CAS
WE
A12,A13 A11 - A0
Self Refresh
H
X
X
X
X
X
X
X
INVALID
1
L
H
H
X
X
X
X
X
Exit Self Refresh with Device Deselect
2
L
H
L
H
H
H
X
X
Exit Self Refresh with No Operation
2
L
H
L
H
H
L
X
X
ILLEGAL
2
L
H
L
H
L
X
X
X
ILLEGAL
2
L
H
L
L
X
X
X
X
ILLEGAL
2
L
L
X
X
X
X
X
X
Maintain Self Refresh
Power Down
H
X
X
X
X
X
X
X
INVALID
1
L
H
H
X
X
X
X
X
Power Down mode exit, all banks idle
2
L
H
L
X
X
X
X
X
ILLEGAL
2
L
L
X
X
X
X
X
X
Maintain Power Down Mode
All Banks Idle
H
H
H
X
X
X
Refer to the Idle State section of the
Current State Truth Table
3
H
H
L
H
X
X
3
H
H
L
L
H
X
3
H
H
L
L
L
H
X
X
CBR Refresh
H
H
L
L
L
L
OP Code
Mode Register Set
4
H
L
H
X
X
X
Refer to the Idle State section of the
Current State Truth Table
3
H
L
L
H
X
X
3
H
L
L
L
H
X
3
H
L
L
L
L
H
X
X
Entry Self Refresh
4
H
L
L
L
L
L
OP Code
Mode Register Set
L
X
X
X
X
X
X
X
Power Down
4
Any State
other than
listed above
H
H
X
X
X
X
X
X
Refer to operations in the Current
State Truth Table
H
L
X
X
X
X
X
X
Begin Clock Suspend next cycle
5
L
H
X
X
X
X
X
X
Exit Clock Suspend next cycle
L
L
X
X
X
X
X
X
Maintain Clock Suspend
1. For the given Current State CKE must be low in the previous cycle.
2. When CKE has a low to high transition, the clock and other inputs are re-enabled asynchronously. The minimum setup time for
CKE (t
CES
) must be satisfied. When exiting power down mode, a NOP command (or Device Deselect Command) is required on
the first rising clock after CKE goes high (see page 28).
3. The address inputs (A13 - A0) depend on the command that is issued. See the Idle State section of the Current State Truth Table
for more information.
4. The Precharge Power Down Mode, the Self Refresh Mode, and the Mode Register Set can only be entered from the all banks idle
state.
5. Must be a legal command as defined in the Current State Truth Table.
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