參數(shù)資料
型號： HYS72T64301HP-3S-A
廠商： QIMONDA AG
元件分類： DRAM
英文描述： 240-Pin Registered DDR2 SDRAM Modules
中文描述： 64M X 72 DDR DRAM MODULE, 0.45 ns, DMA240
封裝： GREEN, DIMM-240
文件頁數(shù)： 15/42頁
文件大?。?/td> 1068K
代理商： HYS72T64301HP-3S-A
Internet Data Sheet
Rev. 1.0, 2006-10
09152006-R5MQ-5KS2
15
HYS72T64301HP–[3S/3.7]–A
Registered DDR2 SDRAM Modules
3.2
DC Operating Conditions
This chapter contains the DC operating conditions tables.
TABLE 11
Operating Conditions
TABLE 12
Supply Voltage Levels and DC Operating Conditions
Parameter
Symbol
Values
Unit
Note
Min.
Max.
Operating temperature (ambient)
DRAM Case Temperature
Storage Temperature
Barometric Pressure (operating & storage)
Operating Humidity (relative)
T
OPR
T
CASE
T
STG
PBar
H
OPR
0
0
– 50
+69
10
+65
+95
+100
+105
90
°
C
°
C
°
C
kPa
%
1)2)3)4)
1) DRAM Component Case Temperature is the surface temperature in the center on the top side of any of the DRAMs.
2) Within the DRAM Component Case Temperature Range all DRAM specifications will be supported
3) Above 85 °C DRAM Case Temperature the Auto-Refresh command interval has to be reduced to
t
REFI
= 3.9
μ
s
4) When operating this product in the 85 °C to 95 °C
T
CASE
temperature range, the High Temperature Self Refresh has to be enabled by
setting EMR(2) bit A7 to “1”. When the High Temperature Self Refresh is enabled there is an increase of
I
DD6
by approximately 50%.
5) Up to 3000 m.
5)
Parameter
Symbol
Values
Unit
Note
Min.
Typ.
Max.
Device Supply Voltage
Output Supply Voltage
Input Reference Voltage
SPD Supply Voltage
DC Input Logic High
DC Input Logic Low
In / Output Leakage Current
V
DD
V
DDQ
V
REF
V
DDSPD
V
IH(DC)
V
IL (DC
)
I
L
1.7
1.7
0.49
×
V
DDQ
1.7
V
REF
+ 0.125
– 0.30
– 5
1.8
1.8
0.5
×
V
DDQ
—
—
—
—
1.9
1.9
0.51
×
V
DDQ
3.6
V
DDQ
+ 0.3
V
REF
– 0.125
5
V
V
V
V
V
V
μ
A
1)
1) Under all conditions,
V
DDQ
must be less than or equal to
V
DD
2) Peak to peak AC noise on
V
REF
may not exceed ± 2%
V
REF
(DC).
V
REF
is also expected to track noise in
V
DDQ
.
3) Input voltage for any connector pin under test of 0 V
≤
V
IN
≤
V
DDQ
+ 0.3 V; all other pins at 0 V. Current is per pin
2)
3)
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