參數(shù)資料
型號(hào): HYS72D64320GBR-5-B
廠商: INFINEON TECHNOLOGIES AG
英文描述: 184 - Pin Registered Double Data Rate SDRAM Modules
中文描述: 184 -引腳注冊(cè)雙倍數(shù)據(jù)速率SDRAM模塊
文件頁(yè)數(shù): 8/48頁(yè)
文件大小: 844K
代理商: HYS72D64320GBR-5-B
HYS72D[32/64/128]3[00/20]GBR
Registered Double Data Rate SDRAM Modules
Pin Configuration
Data Sheet
8
Rev. 1.1, 2004-04
10102003-01E2-HPA8
2
Pin Configuration
The pin configuration of the Registered DDR SDRAM
DIMM is listed by function in
Table 3
(184 pins). The
abbreviations used in columns Pin and Buffer Type are
explained in
Table 4
and
Table 5
respectively. The pin
numbering is depicted in
Figure 1
.
Table 3
Pin# Name
Pin Configuration of RDIMM
Pin
Type
Type
Clock Signals
137
CK0
I
138
CK0
I
21
CKE0
I
111
CKE1
I
Buffer
Function
SSTL
SSTL
SSTL
SSTL
Clock Signal
Complement Clock
Clock Enable Rank 0
Clock Enable Rank 1
Note:2-rank module
Note:
1
-rank module
NC
NC
SSTL
Control Signals
157
S0
158
S1
I
I
SSTL
SSTL
Chip Select of Rank 0
Chip Select of Rank 1
Note:2-ranks module
Note:1-rank module
Row Address Strobe
Column Address
Strobe
Write Enable
Register Reset
Forces registered
inputs low
Note:For detailed
description of the
Power Up and
Power
Management see
the Application
Note at the end of
data sheet
NC
RAS
CAS
NC
I
I
SSTL
SSTL
154
65
63
10
WE
RESET I
I
SSTL
LV-
CMOS
Address Signals
59
BA0
52
BA1
48
A0
43
A1
41
A2
130
A3
37
A4
32
A5
I
I
I
I
I
I
I
I
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
Bank Address Bus
1:0
Address Bus 11:0
Address Bus 11:0
125
29
122
27
141
A6
A7
A8
A9
A10
AP
A11
A12
I
I
I
I
I
I
I
I
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
Address Bus 11:0
118
115
Address Signal 12
Note:Module based on
256 Mbit or larger
dies
Note:128 Mbit based
module
Address Signal 13
Note:1 Gbit based
module
Note:Module based on
512 Mbit or
smaller dies
NC
NC
167
A13
I
SSTL
NC
NC
Table 3
Pin# Name
Pin Configuration of RDIMM
(cont’d)
Pin
Type
Type
Buffer
Function
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