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參數資料
| 型號： | HT23B60-100QFP-A |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 60x11 Pixel Data Bank 8-Bit Mask MCU |
| 中文描述： | 60x11像素數據銀行8位微控制器面膜 |
| 文件頁數： | 9/50頁 |
| 文件大小： | 314K |
| 代理商： | HT23B60-100QFP-A |
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HT23B60
Rev. 1.10
9
March 1, 2004
The conditional skip is activated by instruction. Once the
condition is met, the next instruction, fetched during the
current instruction execution, is discarded and a dummy
cycle takes its place while the correct instruction is ob-
tained.
The lower byte of the program counter (PCL) is a
read/write register (06H). Moving data into the PCL per-
forms a short jump. The destination must be within 256
locations.
When a control transfer takes place, an additional
dummy cycle is required.
Program Memory
ROM
The program memory, which contains executable pro-
gram instructions, data and table information, is com-
posed of a 32768 16 bit format. However as the PC
(program counter) is comprised of only 13 bits, the re-
maining 2 ROM address bits are managed by dividing
the program memory into 4 banks, each bank having a
range between 0000H and 1FFFH. To move from the
presentROMbanktoadifferentROMbank,thehigher2
bits of the ROM address are set by the BP (Bank
Pointer), while the remaining 13 bits of the PC are set in
the usual way by executing the appropriate jump or call
instruction. As the full 15 address bits are latched during
the execution of a call or jump instruction, the correct
value of the BP must first be setup before a jump or call
is executed. When either a software or hardware inter-
rupt is received, note that no matter which ROM bank
the program is in the program will always jump to the ap-
propriate interrupt service address in Bank 0. The origi-
nal full 15 bit address will be stored on the stack and
restored when the relevant RET/RETI instruction is exe-
cuted, automatically returning the program to the origi-
nal ROM bank. This eliminates the need for
programmerstomanagetheBPwheninterruptsoccur.
Certain locations in Bank 0 of program memory are re-
served for special usage:
ROM Bank 0 (BP5~BP6=00B)
The ROM bank 0 ranges from 0000H to 1FFFH.
Location 000H
This area is reserved for the initialization program. Af-
ter a chip reset, the program always begins execution
at location 000H.
Location 004H
This area is reserved for the external interrupt or serial
input interrupt service routine. If the INT input pin is
activated, and the interrupt is enabled and the stack is
not full, the program will jump to location 004H and be-
gins execution.
Location 008H
This area is reserved for the timer counter 0 interrupt
service program. If a timer interrupt results from a timer
counter 0 overflow, and if the interrupt is enabled and
the stack is not full, the program will jump to location
008H and begins execution.
Location 00CH
This area is reserved for the timer 2 interrupt service
program. If a timer interrupt resulting from a timer 2
overflow, and if the interrupt is enabled and the stack
is not full, the program will jump to location 00CH and
begins execution.
Location 010H
This area is reserved for the keyscan interrupt
When the keyscan function is enabled and the stack is
not full, the program begins execution a location 010H
on each common clock.
Location 014H
This location is reserved for real time clock (RTC) in-
terrupt service program. When the RTC generator is
enabled and time-out occurs, the RTC interrupt is en-
abled and the stack is not full, the program begins ex-
ecution at location 014H.
Location 018H
This area is reserved for the PWM D/A buffer empty
interruptserviceprogram.AfterthesystemlatchaD/A
code at RAM address 28H, if the interrupt is enabled
and the stack is not full, the program begins execution
at location 018H.
Location 020H
For best condition, this location is reserved at the be-
ginning when writing a program.
ROM Bank 1~3 (BP5~BP6=01B~11B)
The range of the ROM starts from n000H to (n+1)
FFFH. (n=2,4,6)
Table location
AnylocationintheROMspacecanbeusedaslookup
table. The instructions TABRDC [m] (use for any
bank) and TABRDL [m] (only used for last page of
program ROM) transfers the contents of the
lower-order byte to the specified data memory, and
the higher-order byte to TBLH (08H). Only the desti-
nation of the lower-order byte in the table is
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Program Memory
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|---|---|
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| HT23C020 | CMOS 256K x 8-Bit Mask ROM(CMOS 256K x 8位掩模式ROM) |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| HT23C010 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:CMOS 128Kⅴ 8-Bit Mask ROM |
| HT23C020 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:CMOS 256Kx 8-Bit Mask ROM |
| HT23C040 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:CMOS 512Kx8-Bit Mask ROM |
| HT23C040H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS 512K?8-Bit High Speed Mask ROM |
| HT23C128 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:CMOS 16Kx 8-Bit Mask ROM |
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