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參數(shù)資料
| 型號(hào)： | HPA00021DGGR |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 14-BIT REGISTERED BUFFER WITH SSTL 2 INPUTS AND OUTPUTS |
| 中文描述： | 14位注冊(cè)緩沖區(qū)薩里衛(wèi)星技術(shù)有限公司2輸入和輸出 |
| 文件頁(yè)數(shù)： | 5/9頁(yè) |
| 文件大?。?/td> | 156K |
| 代理商： | HPA00021DGGR |
SCES344E
–
DECEMBER 2000
–
REVISED NOVEMBER 2002
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VCC/2
VOLTAGE AND CURRENT WAVEFORMS
INPUTS ACTIVE AND INACTIVE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. ICC tested with clock and data inputs held at VCC or GND, and IO = 0 mA.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, ZO = 50
,
input slew rate = 1 V/ns
±
20% (unless otherwise noted).
D. The outputs are measured one at a time with one transition per measurement.
E. VTT = VREF = VDDQ/2
F. VIH = VREF + 310 mV (ac voltage levels) for differential inputs. VIH = VCC for LVCMOS input.
G. VIL = VREF
–
310 mV (ac voltage levels) for differential inputs. VIL = GND for LVCMOS input.
H. tPLH and tPHL are the same as tpd.
0 V
VCC
LOAD CIRCUIT
50
CL = 30 pF
(see Note A)
Test Point
VTT
From Output
Under Test
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
VICR
VREF
Input
VIL
VIH
VREF
VI(PP)
tPHL
VOH
VOL
Output
VTT
VTT
tPLH
tPHL
VIH
VIL
VOL
VOH
LVCMOS
RESET
Input
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VTT
VCC/2
VI(PP)
VICR
Timing
Input
VICR
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCC/2
VREF
Input
VREF
tw
VOLTAGE WAVEFORMS
PULSE DURATION
VIH
VIL
LVCMOS
RESET
Input
tact
tinact
10%
90%
ICCH
ICCL
ICC
(see
Note B)
tsu
th
Figure 1. Load Circuit and Voltage Waveforms
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