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參數(shù)資料
| 型號(hào)： | HM5225805BTT-A6 |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank /16-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM |
| 中文描述： | 32M X 8 SYNCHRONOUS DRAM, 6 ns, PDSO54 |
| 封裝： | 0.400 INCH, PLASTIC, TSOP2-54 |
| 文件頁數(shù)： | 17/63頁 |
| 文件大小： | 462K |
| 代理商： | HM5225805BTT-A6 |
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HM5225165B/HM5225805B/HM5225405B-75/A6/B6
Data Sheet E0082H10
17
From PRECHARGE state, command operation
To [DESL], [NOP]:
When these commands are executed, the SDRAM enters the IDLE state after t
RP
has
elapsed from the completion of precharge.
From IDLE state, command operation
To [DESL], [NOP], [PRE] or [PALL]:
These commands result in no operation.
To [ACTV]:
The bank specified by the address pins and the ROW address is activated.
To [REF], [SELF]:
The SDRAM enters refresh mode (auto-refresh or self-refresh).
To [MRS]:
The synchronous DRAM enters the mode register set cycle.
From ROW ACTIVE state, command operation
To [DESL], [NOP]:
These commands result in no operation.
To [READ], [READ A]:
A read operation starts. (However, an interval of t
RCD
is required.)
To [WRIT], [WRIT A]:
A write operation starts. (However, an interval of t
RCD
is required.)
To [ACTV]:
This command makes the other bank active. (However, an interval of t
RRD
is required.)
Attempting to make the currently active bank active results in an illegal command.
To [PRE], [PALL]:
These commands set the SDRAM to precharge mode. (However, an interval of t
RAS
is
required.)
From READ state, command operation
To [DESL], [NOP]:
These commands continue read operations until the burst operation is completed.
To [READ], [READ A]:
Data output by the previous read command continues to be output. After
CAS
latency, the data output resulting from the next command will start.
To [WRIT], [WRIT A]:
These commands stop a burst read, and start a write cycle.
To [ACTV]:
This command makes other banks bank active. (However, an interval of t
RRD
is required.)
Attempting to make the currently active bank active results in an illegal command.
To [PRE], [PALL]:
These commands stop a burst read, and the SDRAM enters precharge mode.
From READ with AUTO-PRECHARGE state, command operation
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HM5225405BTT-A6 | 256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank /16-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM |
| HM5225325F-B60 | 256M LVTTL interface SDRAM 100 MHz 1-Mword x 64-bit x 4-bank/2-Mword x 32-bit x 4-bank PC/100 SDRAM |
| HM5225645F-B60 | 256M LVTTL interface SDRAM 100 MHz 1-Mword x 64-bit x 4-bank/2-Mword x 32-bit x 4-bank PC/100 SDRAM |
| HM5225325F | 256-Mbit SDRAM(256M位同步RAM) |
| HM5225645F | 256-Mbit SDRAM(256M位同步RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM5225805BTT-B6 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M LVTTL interface SDRAM 133 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank /16-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM |
| HM-523841-1.5-8A | 功能描述:電線鑒定 HM 2.06/3.31" LABEL PRICE PER LABEL RoHS:否 制造商:TE Connectivity / Q-Cees 產(chǎn)品:Labels and Signs 類型: 材料:Vinyl 顏色:Blue 寬度:0.625 in 長(zhǎng)度:1 in |
| HM5241605 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Series 131 072-Word x 16-Bit x 2-Bank Synchronous Dynamic RAM |
| HM5241605C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Series 4M LVTTL Interface SDRAM (128-kword x 16-bit) 83 MHz/80MHz/66 |
| HM5241605CJ-12 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SDRAM |
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