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參數(shù)資料
| 型號： | HI7191IP |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | ADC |
| 英文描述： | 24-Bit, High Precision, Sigma Delta A/D Converter |
| 中文描述： | 1-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDIP20 |
| 文件頁數(shù)： | 18/24頁 |
| 文件大?。?/td> | 187K |
| 代理商： | HI7191IP |
1914
IR WRITE PHASE
DATA TRANSFER PHASE - TWO-BYTE WRITE
CS
SCLK
SDIO
SDO
THREE-STATE
THREE-STATE
I0
I1
I2
I3
I4
I5
I6
I7
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11 B12
B13
B14
B15
FIGURE 14. DATA WRITE CYCLE, SCLK IDLE LOW
IR WRITE PHASE
DATA TRANSFER PHASE - TWO-BYTE WRITE
CS
SCLK
SDIO
SDO
I0
I1
I2
I3
I4
I5
I6
I7
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11 B12
B13
B14
B15
THREE-STATE
THREE-STATE
FIGURE 15. DATA WRITE CYCLE, SCLK IDLE HIGH
DATA TRANSFER PHASE - TWO-BYTE READ
CS
SCLK
SDIO
SDO
I0
I1
I2
I3
I4
I5
I6
I7
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11 B12
B13
B14
B15
IR WRITE PHASE
FIGURE 16. DATA READ CYCLE, 3-WIRE CONFIGURATION, SCLK IDLE LOW
IR WRITE PHASE
DATA TRANSFER PHASE - TWO-BYTE READ
CS
SCLK
SDIO
SDO
I0
I1
I2
I3
I4
I5
I6
I7
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11 B12
B13
B14
B15
FIGURE 17. DATA READ CYCLE, 3-WIRE CONFIGURATION, SCLK IDLE HIGH
THREE-STATE
THREE-STATE
IR WRITE PHASE
DATA TRANSFER PHASE - TWO-BYTE READ
CS
SCLK
SDIO
SDO
I0
I1
I2
I3
I4
I5
I6
I7
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11 B12
B13
B14
B15
FIGURE 18. DATA READ CYCLE, 2-WIRE CONFIGURATION, SCLK IDLE LOW
HI7191
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