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參數(shù)資料
| 型號： | HI-8482DT |
| 廠商： | HOLT INTEGRATED CIRCUITS INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 384 MCELL 3 VOLT ZERO POWER ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | DUAL LINE RECEIVER, CDIP20 |
| 封裝： | CERDIP-20 |
| 文件頁數(shù)： | 8/10頁 |
| 文件大?。?/td> | 676K |
| 代理商： | HI-8482DT |
Package Type:
.017
±
.002
(.432
±
.051)
.100
±
.005
(2.540
±
.127
)
.310
± .
010
(7.874
±
.254)
.125 MIN.
(3.175 MIN.)
.050 TYP.
(1.270 TYP.)
.200 MAX.
(5.080 MAX.)
1.000
±
.010
(25.400
±
.254)
.010
+ .
002/
.001
(.254
±
.051
/
.025)
.300
± .
010
(7.620
±
.254)
.085
±
.009
(2.159
±
.229)
20-PIN CERAMIC SIDE-BRAZED DIP
20C
HI-8482 PACKAGE DIMENSIONS
inches (millimeters)
.5035 ± .0075
(12.789 ± .191)
.4065 ± .0125
(10.325 ± .318)
.296 ± .003
(7.518 ± .076)
0° to 8°
.090 ± .010
(2.286 ± .254)
.0075 ± .0035
(.191 ± .089)
(.050
(.018
SEE DETAIL A
DETAIL A
.033 ± .017
(.838 ± .432)
Package Type:
20-PIN PLASTIC SMALL OUTLINE (SOIC) - WB
(Wide Body)
20HW
.0105 ± .0015
(.2667 ± .0381)
HOLT INTEGRATED CIRCUITS
8
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HI-8482J | 384 MCELL 3 VOLT ZERO POWER ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
| HI-8482PSI | ARINC 429 DUAL LINE RECEIVER |
| HI-8482PST | ARINC 429 DUAL LINE RECEIVER |
| HI-8482S | 384 MCELL 3 VOLT ZERO POWER ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
| HI-8482ST | 384 MCELL 3 VOLT ZERO POWER ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HI8482J | 制造商:Holt Integrated Circuits 功能描述:Line Receiver 2RX 20-Pin PLCC |
| HI-8482J | 制造商:Holt Integrated Circuits 功能描述:Line Receiver 2RX 20-Pin PLCC |
| HI-8482JF | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 DUAL LINE RECEIVER |
| HI-8482JI | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 DUAL LINE RECEIVER |
| HI-8482JIF | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 DUAL LINE RECEIVER |
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