
216
Table 8.3
Port 1 Pin Functions (cont)
Pin
Selection Method and Pin Functions
P1
/TIOCC0/
TCLKA/A
22
The pin function is switched as shown below according to the combination of
the operating mode, TPU channel 0 setting (by bits MD3 to MD0 in TMDR0,
bits IOC3 to IOC0 in TIOR0L, and bits CCLR2 to CCLR0 in TCR0), bits TPSC2
to TPSC0 in TCR0 to TCR2, and bit P12DDR.
Operating
Mode
Modes 1, 2, 3, 7
*
1
Modes 4, 5, 6
*
1
TPU Channel
0 Setting
Table
Below (1)
Table
Below (2)
Table
Below (1)
Table
Below (2)
P12DDR
—
0
1
0
1
0
1
Pin function
TIOCC0
output
P1
2
input
P1
output
TIOCC0
output
A
output
P1
2
input
A
output
TIOCC0
input
*
2
TIOCC0
input
*
2
TCLKA input
*
3
TPU Channel
0 Setting
MD3 to MD0
IOC3 to IOC0
(2)
(1)
(2)
(1)
(1)
(2)
B'0000
B'001x
B'xx00
B'0010
B'0011
B'0000
B'0100
B'1xxx
B'0001 to
B'0011
B'0101 to
B'0111
—
Other than B'xx00
CCLR2 to
CCLR0
—
—
—
Other
than
B'101
PWM
mode 2
output
B'101
Output
function
—
Output
compare
output
—
PWM
mode 1
output
*
4
—
x: Don’t care
Notes: 1. Modes 1 to 3 are not available on the F-ZTAT version.
Modes 2, 3, 6, and 7 are not available on the ROMless version.
2. TIOCC0 input when TPU channel 0 is in normal operation mode
(MD3 to MD0 = B'0000) and input capture is set (IOC3 to IOC0 =
B'10xx).
3. TCLKA input when the TCR0 to TCR5 setting is: TPSC2 to TPSC0
= B'100.
TCLKA input when channel 1 and 5 are set to phase counting
mode (MD3 to MD0 = B'01xx).
4. TIOCD0 output is disabled.
When BFA = 1 or BFB = 1 in TMDR0, output is disabled and
setting (2) applies.