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ROM through the address and data buses.
KING BILLION ELECTRONICS CO., LTD
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HE84G762B
HE80004 Series
June 1, 2004
This specification is subject to change without notice. Please contact sales person for the latest version before use.
12
V0.92
The bit 14 ~ 15 bit of 16-bit logical program address can be mapped to any one (16K bytes per page) of
256 pages through mapping registers PSA1, PSA2, PSA3. As logical page 0 can not be moved and is
always physical page 0, the PSA1 ~ PSA3 contain the physical page addresses of logical pages 1 ~ 3.
Logical Address
A15 A14 A13 A12 A11 A10 A9
A8
Page Addr. A13 A12 A11 A10 A9
A8
A[15..14] Logical Page
Physical Page Address Physical Address
00
0
01
1
10
2
11
3
Register Address
Type
PSA1
0x2C
R/W
A21
A20
A19
PSA2
0x2D
R/W
A21
A20
A19
PSA3
0x2E
R/W
A21
A20
A19
A7
A7
A6
A6
A5
A5
A4
A4
A3
A3
A2
A2
A1
A1
A0
A0
0
00A[13..0]
PSA1+A[13..0]
PSA2+A[13..0]
PSA3+A[13..0]
PSA1
PSA2
PSA3
Bits Definition
A18
A18
A18
Reset
0x01
0x02
0x03
A17
A17
A17
A16
A16
A16
A15
A15
A15
A14
A14
A14
There are four configurations for external memory as determined by mask option MO_PMODE. For
example, when option 0 is selected, 512K bytes of internal ROM will occupy the address range from
0x000000 ~ 0x07FFFF of memory space, while CS1 controls external memory device whose address
ranges from 0x200000 to 3FFFFF, etc.
MO_ PMODE [1..0]
00
01
Configuration
Option 0
Option 1