參數(shù)資料
型號(hào)： GS8662T06BD-350I
廠商： GSI TECHNOLOGY
元件分類： SRAM
英文描述： 8M X 8 DDR SRAM, 0.45 ns, PBGA165
封裝： 13 X 15 MM, 1 MM PITCH, FPBGA-165
文件頁(yè)數(shù)： 30/33頁(yè)
文件大?。?/td> 651K
代理商： GS8662T06BD-350I
Pin Description Table
Symbol
Description
Type
Comments
SA
Synchronous Address Inputs
Input
—
R/W
Synchronous Read/Write
Input
High: Read
Low: Write
BW0–BW3
Synchronous Byte Writes
Input
Active Low
NW0–NW1
Synchronous Nybble Writes
Input
Active Low
LD
Synchronous Load Pin
Input
Active Low
K
Input Clock
Input
Active High
K
Input Clock
Input
Active Low
TMS
Test Mode Select
Input
—
TDI
Test Data Input
Input
—
TCK
Test Clock Input
Input
—
TDO
Test Data Output
Output
—
VREF
HSTL Input Reference Voltage
Input
—
ZQ
Output Impedance Matching Input
Input
—
DQ
Data I/O
Input/Output
Three State
Doff
Disable DLL when low
Input
Active Low
CQ
Output Echo Clock
Output
—
CQ
Output Echo Clock
Output
—
VDD
Power Supply
Supply
1.8 V Nominal
VDDQ
Isolated Output Buffer Supply
Supply
1.8 V or 1.5 V Nominal
VSS
Power Supply: Ground
Supply
—
QVLD
Q Valid Output
Output
—
ODT
On-Die Termination
Input
Active High
NC
No Connect
—
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.02 3/2011
6/33
2011, GSI Technology
GS8662T20/38BD-550/500/450/400/350
GS8662T06/11BD-500/450/400/350
Notes:
1. NC = Not Connected to die or any other pin
2. When ZQ pin is directly connected to VDDQ, output impedance is set to minimum value and it cannot be connected to ground or left
unconnected.
3. K and K cannot be set to VREF voltage.
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PDF描述
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GS8672Q38BE-500I 2M X 36 QDR SRAM, 0.45 ns, PBGA165
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS8662T06BD-450 制造商:GSI Technology 功能描述:GS8662T06BD-450 - Trays
GS8662T06BD-500 制造商:GSI Technology 功能描述:GS8662T06BD-500 - Trays
GS8662T06BD-550 制造商:GSI Technology 功能描述:GS8662T06BD-550 - Trays
GS8662T07BD-450 制造商:GSI Technology 功能描述:165 FBGA - Bulk
GS8662T08BD-400 制造商:GSI Technology 功能描述:165 FBGA - Bulk
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