- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄17112 > EVAL-ADUC831QSZ (Analog Devices Inc)KIT DEV FOR ADUC831 QUICK START PDF資料下載
參數(shù)資料
| 型號(hào)： | EVAL-ADUC831QSZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 31/76頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | KIT DEV FOR ADUC831 QUICK START |
| 產(chǎn)品培訓(xùn)模塊： | Process Control |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | QuickStart™ 套件 |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | ADuC831 |
| 所含物品： | 評(píng)估板、電源、纜線、軟件和說(shuō)明文檔 |
| 產(chǎn)品目錄頁(yè)面： | 739 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | ADUC831BCPZ-ND - IC MCU 62K FLASH ADC/DAC 56LFCSP ADUC831BCPZ-REEL-ND - IC MCU 62K FLASH ADC/DAC 56LFCSP ADUC831BSZ-REEL-ND - IC MCU 62K FLASH ADC/DAC 52MQFP ADUC831BSZ-ND - IC ADC/DAC 12BIT W/MCU 52-MQFP |
| 其它名稱： | EVAL-ADUC831QS EVAL-ADUC831QS-ND |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)當(dāng)前第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)
REV. 0
ADuC831
–37–
MODE 4: Dual NRZ 16-Bit
-
DAC
Mode 4 provides a high speed PWM output similar to that of a
-
DAC. Typically, this mode will be used with the PWM
clock equal to 16 MHz.
In this mode P2.6 and P2.7 are updated every PWM clock
(62 ns in the case of 16 MHz). Over any 65536 cycles (16 bit
PWM) PWM0 (P2.6) is high for PWM0H/L cycles and low for
(65536 - PWM0H/L) cycles. Similarly PWM1 (P2.7) is high for
PWM1H/L cycles and low for (65536 - PWM1H/L) cycles.
For example, if PWM1H was set to 4010H (slightly above one
quarter of FS) then typically P2.7 will be low for three clocks
and high for one clock (each clock is approximately 80 ns). Over
every 65536 clocks the PWM will compensate for the fact that
the output should be slightly above one quarter of full scale by
having a high cycle followed by only two low cycles.
16MHz
16-BIT
62 s
0
16-BIT
CARRY OUT AT P2.6
PWM0H/L = C000H
PWM1H/L = 4000H
00
1
00
0
LATCH
0
11
1
0
62 s
CARRY OUT AT P2.7
Figure 30. PWM Mode 4
For faster DAC outputs (at lower resolution) write 0s to the
LSBs that are not required. If for example only 12-bit perfor-
mance is required then write 0s to the 4LSBs. This means that a
12-bit accurate
Σ- DAC output can occur at 3.906 kHz. Simi-
larly, writing 0s to the 8 LSBs gives an 8-bit accurate
Σ- DAC
output at 62 kHz.
MODE 5: Dual 8-Bit PWM
In Mode 5, the duty cycle of the PWM outputs and the resolu-
tion of the PWM outputs are individually programmable. The
maximum resolution of the PWM output is eight bits. The
output resolution is set by the PWM1L and PWM1H SFRs for
the P2.6 and P2.7 outputs, respectively. PWM0L and PWM0H
sets the duty cycles of the PWM outputs at P2.6 and P2.7, respec-
tively. Both PWMs have same clock source and clock divider.
P2.7
P2.6
PWM COUNTERS
PWM1H
0
PWM1L
PWM0H
PWM0L
Figure 31. PWM Mode 5
MODE 6: Dual RZ 16-Bit
-
DAC
Mode 6 provides a high speed PWM output similar to that of a
-
DAC. Mode 6 operates very similarly to Mode 4. However,
the key difference is that Mode 6 provides return to zero (RZ)
-
DAC output. Mode 4 provides non-return-to-zero - DAC
outputs. The RZ mode ensures that any difference in the rise
and fall times will not effect the -
DAC INL. However, the
RZ mode halves the dynamic range of the -
DAC outputs
from 0–AVDD down to 0–AVDD/2. For best results, this mode
should be used with a PWM clock divider of four.
If PWM1H was set to 4010H (slightly above one quarter of
FS), then typically P2.7 will be low for three full clocks (3
62 ns), high for half a clock (31 ns) and then low again for half
a clock (31 ns) before repeating itself. Over every 65536 clocks
the PWM will compensate for the fact that the output should be
slightly above one quarter of full scale by leaving the output
high for two half clocks in four every so often.
4MHz
16-BIT
248 s
0
16-BIT
CARRY OUT AT P2.6
PWM0H/L = C000H
PWM1H/L = 4000H
00
1
00
0
LATCH
0
11
1
0
248 s
CARRY OUT AT P2.7
0, 3/4, 1/2, 1/4, 0
Figure 32. PWM Mode 6
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HMM08DRKI | CONN EDGECARD 16POS DIP .156 SLD |
| 0210490856 | CABLE JUMPER 1.25MM .051M 17POS |
| EVAL-ADUC7028QSZ | KIT DEV ADUC7028 QUICK START |
| GMM12DREN | CONN EDGECARD 24POS .156 EYELET |
| GSM12DREH | CONN EDGECARD 24POS .156 EYELET |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-ADUC832QS | 制造商:Analog Devices 功能描述:QUICK START DEVELOPMENT SYSTEM - Bulk 制造商:Analog Devices 功能描述:DEVELOPMENT KIT SYSTEM |
| EVAL-ADUC832QSZ | 功能描述:KIT DEV FOR ADUC832 QUICK START RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 通用嵌入式開(kāi)發(fā)板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ 套件 標(biāo)準(zhǔn)包裝:1 系列:PICDEM™ 類型:MCU 適用于相關(guān)產(chǎn)品:PIC10F206，PIC16F690，PIC16F819 所含物品:板，線纜，元件，CD，PICkit 編程器 產(chǎn)品目錄頁(yè)面:659 (CN2011-ZH PDF) |
| EVAL-ADUC834QS | 制造商:Analog Devices 功能描述:DATA ACQ SYS, MICROCNVRTR, DUAL 16BIT/24BIT - ADCS W/ EMBEDD - Bulk 制造商:Analog Devices 功能描述:8052 ADUC834 QUICKSTART DEV KIT |
| EVAL-ADUC834QSZ | 功能描述:KIT DEV QUICK START ADUC834 RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 通用嵌入式開(kāi)發(fā)板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ 套件 標(biāo)準(zhǔn)包裝:1 系列:PICDEM™ 類型:MCU 適用于相關(guān)產(chǎn)品:PIC10F206，PIC16F690，PIC16F819 所含物品:板，線纜，元件，CD，PICkit 編程器 產(chǎn)品目錄頁(yè)面:659 (CN2011-ZH PDF) |
| EVAL-ADUC836QS | 制造商:Analog Devices 功能描述:MCU 8BIT 8052 CISC 62KB+4KB FLASH 3.6V 48LQFP - Bulk 制造商:Analog Devices 功能描述:KIT- ADUC836 DEV SYSTEM |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。