參數(shù)資料
型號(hào)： EVAL-AD7939CBZ
廠商： Analog Devices Inc
文件頁數(shù)： 2/36頁
文件大小： 0K
描述： BOARD EVALUATION FOR AD7939CBZ
標(biāo)準(zhǔn)包裝： 1
ADC 的數(shù)量： 1
位數(shù)： 10
采樣率（每秒）： 1.5M
數(shù)據(jù)接口： 并聯(lián)
輸入范圍： ±VREF
在以下條件下的電源（標(biāo)準(zhǔn)）： 13.5mW @ 5V
工作溫度： -40°C ~ 85°C
已用 IC / 零件： AD7939
已供物品： 板，CD
相關(guān)產(chǎn)品： AD7939BSUZ-ND - IC ADC 10BIT 8CH PARALL 32TQFP
AD7939BCPZ-ND - IC ADC 10BIT 8CH PARALL 32LFCSP
AD7939BCPZ-REEL7-ND - IC ADC 10BIT 8CH PARALL 32LFCSP
AD7939BSUZ-REEL7-ND - IC ADC 10BIT 8CH PARALL 32TQFP
AD7938/AD7939
Data Sheet
Rev. C | Page 10 of 36
Pin No.
Mnemonic
Description
21
AGND
Analog Ground. This is the ground reference point for all analog circuitry on the AD7938/AD7939. All analog input
signals and any external reference signal should be referred to this AGND voltage. The AGND and DGND voltages
should ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis.
22
VREFIN/VREFOUT
Reference Input/Output. This pin is connected to the internal reference and is the reference source for the ADC.
The nominal internal reference voltage is 2.5 V, which appears at this pin. It is recommended that this pin is
decoupled to AGND with a 470 nF capacitor. This pin can be overdriven by an external reference. The input voltage
range for the external reference is 0.1 V to VDD; however, care must be taken to ensure that the analog input range
does not exceed VDD + 0.3 V. See the Reference section.
23 to
30
VIN0 to VIN7
Analog Input 0 to Analog Input 7. Eight analog input channels that are multiplexed into the on-chip track-and-
hold. The analog inputs can be programmed to be eight single-ended inputs, four fully differential pairs, four
pseudo differential pairs, or seven pseudo differential inputs by setting the MODE bits in the control register
appropriately (see Table 10). The analog input channel to be converted can either be selected by writing to the
address bits (ADD2 to ADD0) in the control register prior to the conversion or the on-chip sequencer can be used.
The SEQ and SHDW bits in conjunction with the address bits in the control register allow the shadow register to be
programmed. The input range for all input channels can either be 0 V to VREF or 0 V to 2 × VREF, and the coding can
be binary or twos complement, depending on the states of the RANGE and CODING bits in the control register.
Any unused input channels should be connected to AGND to avoid noise pickup.
31
VDD
Power Supply Input. The VDD range for the AD7938/AD7939 is 2.7 V to 5.25 V. The supply should be decoupled to
AGND with a 0.1 F capacitor and a 10 F tantalum capacitor.
32
W/B
Word/Byte Input. When this input is logic high, data is transferred to and from the AD7938/AD7939 in 12-bit/10-bit
words on the DB0/DB2 to DB11 pins. When this pin is logic low, byte transfer mode is enabled. Data and the
channel ID are transferred on Pin DB0 to Pin DB7, and Pin DB8/HBEN assumes its HBEN functionality. Unused data
lines when operating in byte transfer mode should be tied off to DGND.
EPAD
Exposed Pad. The exposed pad is located on the underside of the package. Connect the EPAD to the ground plane
of the PCB using multiple vias.
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