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參數(shù)資料
| 型號： | EVAL-AD7939CBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD7939CBZ |
| 標準包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 1.5M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 輸入范圍： | ±VREF |
| 在以下條件下的電源（標準）： | 13.5mW @ 5V |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7939 |
| 已供物品： | 板，CD |
| 相關產(chǎn)品： | AD7939BSUZ-ND - IC ADC 10BIT 8CH PARALL 32TQFP AD7939BCPZ-ND - IC ADC 10BIT 8CH PARALL 32LFCSP AD7939BCPZ-REEL7-ND - IC ADC 10BIT 8CH PARALL 32LFCSP AD7939BSUZ-REEL7-ND - IC ADC 10BIT 8CH PARALL 32TQFP |
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Data Sheet
AD7938/AD7939
Rev. C | Page 21 of 36
03715-
032
VREF
p-p
VIN+
VIN–
VREF
p-p
*ADDITIONAL PINS OMITTED FOR CLARITY.
AD7938/
AD7939*
COMMON-MODE
VOLTAGE
Figure 25. Differential Input Definition
The amplitude of the differential signal is the difference
between the signals applied to the VIN+ and VIN pins in each
differential pair (that is, VIN+ VIN). VIN+ and VIN should be
simultaneously driven by two signals each of amplitude VREF (or
2 × VREF depending on the range chosen) that are 180° out of
phase. The amplitude of the differential signal is therefore VREF
to +VREF peak-to-peak (that is, 2 × VREF). This is regardless of
the common mode (CM). The common mode is the average of
the two signals (that is, (VIN+ + VIN)/2) and is therefore the
voltage on which the two inputs are centered. This results in the
span of each input being CM ± VREF/2. This voltage has to be set
up externally and its range varies with the reference value VREF.
As the value of VREF increases, the common-mode range
decreases. When driving the inputs with an amplifier, the actual
common-mode range is determined by the amplifier’s output
voltage swing.
Figure 26 and Figure 27 show how the common-mode range
typically varies with VREF for a 5 V power supply using the 0 V
to VREF range or 2 × VREF range, respectively. The common
mode must be in this range to guarantee the functionality of
the AD7938/AD7939.
When a conversion takes place, the common mode is rejected,
resulting in a virtually noise-free signal of amplitude VREF to
+VREF, corresponding to the digital codes of 0 to 4096 for the
AD7938 and 0 to 1024 for the AD7939. If the 2 × VREF range is
used, the input signal amplitude extends from 2 VREF to +2 VREF
after conversion.
VREF (V)
C
O
MMO
N
-MO
D
E
R
A
N
G
E
(V)
3.5
3.0
2.0
1.5
2.5
1.0
0.5
0
0.5
1.5
1.0
2.0
2.5
3.0
03715-
033
T= 25°C
Figure 26. Input Common-Mode Range vs. VREF (0 V to VREF Range, VDD = 5 V)
VREF (V)
C
O
MMO
N
-MO
D
E
R
A
N
G
E
(V)
4.5
4.0
3.0
1.5
2.0
2.5
3.5
1.0
0.5
0
0.1
0.6
1.6
1.1
2.1
2.6
03715-
034
TA = 25°C
Figure 27. Input Common-Mode Range vs. VREF (2 × VREF Range, VDD = 5 V)
Driving Differential Inputs
Differential operation requires that VIN+ and VIN be
simultaneously driven with two equal signals that are 180° out
of phase. The common mode must be set up externally and has
a range that is determined by VREF, the power supply, and the
particular amplifier used to drive the analog inputs. Differential
modes of operation with either an ac or dc input provide the
best THD performance over a wide frequency range. Since not
all applications have a signal preconditioned for differential
operation, there is often a need to perform single-ended-to-
differential conversion.
Using an Op Amp Pair
An op amp pair can be used to directly couple a differential
signal to one of the analog input pairs of the AD7938/AD7939.
The circuit configurations shown in Figure 28 and Figure 29
show how a dual op amp can be used to convert a single-ended
signal into a differential signal for both a bipolar and unipolar
input signal, respectively.
The voltage applied to Point A sets up the common-mode
voltage. In both diagrams, it is connected in some way to the
reference, but any value in the common-mode range can be
input here to set up the common mode. A suitable dual op amp
that can be used in this configuration to provide differential
drive to the AD7938/AD7939 is the AD8022.
Take care when choosing the op amp; the selection depends on
the required power supply and system performance objectives.
The driver circuits in Figure 28 and Figure 29 are optimized for
dc coupling applications requiring best distortion performance.
The differential op amp driver circuit in Figure 28 is configured
to convert and level shift a single-ended, ground-referenced
(bipolar) signal to a differential signal centered at the VREF level
of the ADC.
The circuit configuration shown in Figure 29 converts a
unipolar, single-ended signal into a differential signal.
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