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| 型號： | EVAL-AD7723CBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 21/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD7723 |
| 標準包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 1.2M |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 輸入范圍： | ±VREF |
| 在以下條件下的電源（標準）： | 475mW @ 1.2MSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7723 |
| 已供物品： | 板，CD |
| 相關產品： | AD7723BSZ-REEL-ND - IC ADC 16BIT SIGMA-DELTA 44MQFP AD7723BSZ-ND - IC ADC 16BIT SIGMA-DELTA 44MQFP |
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AD7723
Rev. C | Page 28 of 32
GROUNDING AND LAYOUT
The analog and digital power supplies to the AD7723 are
independent and separately pinned out to minimize coupling
between the analog and digital sections within the device. The
AD7723 AGND and DGND pins should be soldered directly to
a ground plane to minimize series inductance. In addition, the
ac path from any supply pin or reference pin (REF1 and REF2)
through its decoupling capacitors to its associated ground must
be made as short as possible (Figure 50). To achieve the best
decoupling, place surface-mount capacitors as close as possible
to the device, ideally right up against the device pins.
All ground planes must not overlap to avoid capacitive
coupling. The AD7723’s digital and analog ground planes must
be connected at one place by a low inductance path, preferably
right under the device. Typically, this connection is either a
trace on the printed circuit board of 0.5 cm wide when the
ground planes are on the same layer, or 0.5 cm wide minimum
plated through holes when the ground planes are on different
layers. Any external logic connected to the AD7723 should use
a ground plane separate from the AD7723’s digital ground
plane. These two digital ground planes should also be
connected at just one place.
Separate power supplies for AVDD and DVDD are also highly
desirable. The digital supply pin DVDD should be powered from
a separate analog supply, but if necessary, DVDD may share its
power connection to AVDD, as shown in the connection diagram
in Figure 50. The ferrites are also recommended to filter high
frequency signals from corrupting the analog power supply.
A minimum etch technique is generally best for ground planes
because it gives the best shielding. Noise can be minimized by
paying attention to the system layout and preventing different
signals from interfering with each other. High level analog
signals should be separated from low level analog signals, and
both should be kept away from digital signals. In waveform
sampling and reconstruction systems, the sampling clock
(CLKIN) is as vulnerable to noise as any analog signal. CLKIN
should be isolated from the analog and digital systems. Fast
switching signals like clocks should be shielded with their
associated ground to avoid radiating noise to other sections of
the board, and clock signals should never be routed near the
analog inputs.
Avoid running digital lines under the device as these couple
noise onto the die. The analog ground plane should be allowed
to run under the AD7723 to shield it from noise coupling. The
power supply lines to the AD7723 should use as large a trace as
possible (preferably a plane) to provide a low impedance path
and reduce the effects of glitches on the power supply line.
Avoid crossover of digital and analog signals. Traces on
opposite sides of the board should run at right angles to each
other. This reduces the effects of feedthrough through the
board.
5V
10
F
100nF
10nF
10
F
220nF
10nF
1
F
REF2
AGND2
REF1
AVDD1
AGND1
AGND
AVDD
DVDD
DGND
AD7723 ANALOG
GROUND PLANE
AD7723 DIGITAL
GROUND PLANE
01186-
050
28
6
39
25
26
18
17
9
10
11
21
22
23
Figure 50. Reference and Power Supply Decoupling
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