參數(shù)資料
型號(hào)： EVAL-AD5380EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 31/40頁(yè)
文件大小： 0K
描述： BOARD EVAL FOR AD5380
產(chǎn)品培訓(xùn)模塊： DAC Architectures
標(biāo)準(zhǔn)包裝： 1
DAC 的數(shù)量： 40
位數(shù)： 14
采樣率（每秒）： 125k
數(shù)據(jù)接口： DSP，I²C，MICROWIRE?，并行，QSPI?，SPI?
設(shè)置時(shí)間： 8µs
DAC 型： 電壓
工作溫度： -40°C ~ 85°C
已供物品： 板，CD
已用 IC / 零件： AD5380
Data Sheet
AD5380
Rev. C | Page 37 of 40
UTILIZING THE AD5380 FIFO
The AD5380 FIFO mode optimizes total system update rates
in applications where a large number of channels need to be
updated. FIFO mode is only available when parallel interface
mode is selected. The FIFO EN pin is used to enable the FIFO.
The status of FIFO EN is sampled during the initialization
sequence. Therefore, the FIFO status can only be changed by
resetting the device. In a telescope that provides for the cancella-
tion of atmospheric distortion, for example, a large number of
channels need to be updated in a short period of time.
In such systems, as many as 400 channels need to be updated
within 40 s. Four-hundred channels requires the use of 10
AD5380s. With FIFO mode enabled, the data write cycle time
is 40 ns; therefore, each group consisting of 40 channels can be
fully loaded in 1.6 s. In FIFO mode, a complete group of 40
channels will update in 14.4 s. The time taken to update all
400 channels is 14.4 s + 9 × 1.6 s = 28.8 s. Figure 45 shows
the FIFO operation scheme.
GROUP A
CHNLS 0–39
GROUP B
CHNLS 40–79
GROUP C
CHNLS
80–119
GROUP D
CHNLS
120–159
GROUP E
CHNLS
160–199
GROUP F
CHNLS
200–239
GROUP G
CHNLS
240–279
GROUP H
CHNLS
280–319
GROUP I
CHNLS
320–359
GROUP J
CHNLS
360–399
TIME TO UPDATE 400 CHANNELS = 28.8
s
1.6
s
14.4
s
14.4
s
1.6
s
FIFO DATA LOAD
GROUP A
FIFO DATA LOAD
GROUP B
OUTPUT UPDATE
TIME FOR GROUP A
1.6
s
14.4
s
FIFO DATA LOAD
GROUP J
OUTPUT UPDATE
TIME FOR GROUP J
OUTPUT UPDATE
TIME FOR GROUP B
03731-045
Figure 45. Using FIFO Mode 400 Channels Updated in Under 30 s
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