參數(shù)資料
型號(hào)： EPF6024ATC144-3N
廠商： Altera
文件頁數(shù)： 13/52頁
文件大?。?/td> 0K
描述： IC FLEX 6000 FPGA 24K 144-TQFP
產(chǎn)品培訓(xùn)模塊： Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝： 180
系列： FLEX 6000
LAB/CLB數(shù)： 196
邏輯元件/單元數(shù)： 1960
輸入/輸出數(shù)： 117
門數(shù)： 24000
電源電壓： 3 V ~ 3.6 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 144-LQFP
供應(yīng)商設(shè)備封裝： 144-TQFP（20x20）
20
Altera Corporation
FLEX 6000 Programmable Logic Device Family Data Sheet
Figure 10. LAB Connections to Row & Column Interconnects
For improved routability, the row interconnect consists of full-length and
half-length channels. The full-length channels connect to all LABs in a
row; the half-length channels connect to the LABs in half of the row. In
addition to providing a predictable, row-wide interconnect, this
architecture provides increased routing resources. Two neighboring LABs
can be connected using a half-length channel, which saves the other half
of the channel for the other half of the row. One-third of the row channels
are half-length channels.
Each LE output signal driving
the FastTrack Interconnect can
drive two column channels.
Row
Interconnect
Any column channel can
drive six row channels.
Each local channel
driven by an LE can
drive four row channels.
At each intersection,
four row channels can
drive column channels.
Each LE FastTrack Interconnect
output can drive six row channels.
Column Interconnect
Local Interconnect
From Adjacent
Local Interconnect
LE
Each local channel
driven by an LE can
drive two column
channels.
An LE can be driven by any signal
from two local interconnect areas.
Row interconnect
drives the local
interconnect.
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