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參數(shù)資料
| 型號(hào)： | EBD11ED8ADFB-5 |
| 廠商： | Elpida Memory, Inc. |
| 英文描述： | 1GB Unbuffered DDR SDRAM DIMM (128M words x72 bits, 2 Ranks) |
| 中文描述： | 1GB的無(wú)緩沖DDR SDRAM的內(nèi)存（128M的話x72位，2個(gè)等級(jí)） |
| 文件頁(yè)數(shù)： | 6/19頁(yè) |
| 文件大?。?/td> | 209K |
| 代理商： | EBD11ED8ADFB-5 |
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EBD11ED8ABFB
Preliminary Data Sheet E0295E20 (Ver. 2.0)
6
Byte No.
Function described
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value
Comments
28
Minimum row active to row active
delay (tRRD)
-6B
-7A, -7B
0
0
1
1
0
0
0
0
30H
12ns
0
0
1
1
1
1
0
0
3CH
15ns
29
Minimum /RAS to /CAS delay (tRCD)
-6B
-7A, -7B
0
1
0
0
1
0
0
0
48H
18ns
0
1
0
1
0
0
0
0
50H
20ns
30
Minimum active to precharge time
(tRAS)
-6B
-7A, -7B
0
0
1
0
1
0
1
0
2AH
42ns
0
0
1
0
1
1
0
1
2DH
45ns
31
Module bank density
1
0
0
0
0
0
0
0
80H
512M bytes
32
Address and command setup time
before clock (tIS)
-6B
0
1
1
1
0
1
0
1
75H
0.75ns*
1
-7A, -7B
1
0
0
1
0
0
0
0
90H
0.9ns*
1
33
Address and command hold time after
clock (tIH)
-6B
0
1
1
1
0
1
0
1
75H
0.75ns*
1
-7A, -7B
1
0
0
1
0
0
0
0
90H
0.9ns*
1
34
Data input setup time before clock
(tDS)
-6B
0
1
0
0
0
1
0
1
45H
0.45ns*
1
-7A, -7B
0
1
0
1
0
0
0
0
50H
0.5ns*
1
35
Data input hold time after clock (tDH)
-6B
0
1
0
0
0
1
0
1
45H
0.45ns*
1
-7A, -7B
0
1
0
1
0
0
0
0
50H
0.5ns*
1
36 to 40
Superset information
0
0
0
0
0
0
0
0
00H
Future use
41
Active command period (tRC)
-6B
0
0
1
1
1
1
0
0
3CH
60ns*
1
-7A, -7B
0
1
0
0
0
1
0
0
44H
68ns*
1
42
Auto refresh to active/
Auto refresh command cycle (tRFC)
-6B
0
1
0
0
1
0
0
0
48H
75ns*
1
-7A, -7B
0
1
0
0
1
0
1
1
4BH
75ns*
1
43
SDRAM tCK cycle max. (tCK max.)
0
0
1
1
0
0
0
0
30H
12ns*
1
44
Dout to DQS skew
-6B
-7A, -7B
0
0
1
0
1
1
0
1
2DH
450ps*
1
0
0
1
1
0
0
1
0
32H
500ps*
1
45
Data hold skew (tQHS)
-6B
0
1
0
1
0
1
0
1
55H
550ps*
1
-7A, -7B
0
1
1
1
0
1
0
1
75H
750ps*
1
46 to 61
Superset information
0
0
0
0
0
0
0
0
00H
Future use
62
SPD Revision
0
0
0
0
0
0
0
0
00H
63
Checksum for bytes 0 to 62
-6B
0
1
0
1
0
1
0
0
54H
-7A
0
0
0
0
1
1
1
0
0EH
-7B
0
0
1
1
1
0
0
1
39H
64 to 65
Manufacturer’s JEDEC ID code
0
1
1
1
1
1
1
1
7FH
Continuation
code
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EBD11ED8ADFB-5B | Connector |
| EBD11ED8ADFB-5C | 1GB Unbuffered DDR SDRAM DIMM (128M words x72 bits, 2 Ranks) |
| EBD11ED8ADFB-6B | 1GB Unbuffered DDR SDRAM DIMM (128M words x72 bits, 2 Ranks) |
| EBD11ED8ADFB-7A | 210390060 |
| EBD11ED8ADFB-7B | 1GB Unbuffered DDR SDRAM DIMM (128M words x72 bits, 2 Ranks) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EBD11ED8ADFB-5B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Unbuffered DDR SDRAM DIMM (128M words x72 bits, 2 Ranks) |
| EBD11ED8ADFB-5C | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Unbuffered DDR SDRAM DIMM (128M words x72 bits, 2 Ranks) |
| EBD11ED8ADFB-6B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Unbuffered DDR SDRAM DIMM (128M words x72 bits, 2 Ranks) |
| EBD11ED8ADFB-7A | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Unbuffered DDR SDRAM DIMM (128M words x72 bits, 2 Ranks) |
| EBD11ED8ADFB-7B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Unbuffered DDR SDRAM DIMM (128M words x72 bits, 2 Ranks) |
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