參數(shù)資料
型號(hào)： DS26900LN+
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 6/49頁(yè)
文件大?。?/td> 0K
描述： IC JTAG MUX/SWITCH 144-LQFP
標(biāo)準(zhǔn)包裝： 90
系列： *
功能： *
電壓電源： 單電源
電壓 - 電源，單路/雙路(±)： 3.14 V ~ 3.47 V
電流 - 電源： *
工作溫度： *
安裝類(lèi)型： 表面貼裝
封裝/外殼： 144-LQFP
供應(yīng)商設(shè)備封裝： 144-LQFP（20x20）
包裝： 托盤(pán)
__________________________________________________________________________________________DS26900
14
NAME
PIN
TYPE
FUNCTION
GPIO[2]
15
Ipd/O
General-Purpose Input/Output Bit 2. (Internal 20k
Pulldown) This pin is a general-
purpose input/output, which can be read or driven via a register bit. This pin is in input
mode after a global reset.
GPIO[1]
16
Ipd/O
General-Purpose Input/Output Bit 1. (Internal 20k
Pulldown) This pin is a general-
purpose input/output, which can be read or driven via a register bit. This pin is in input
mode after a global reset.
GPIO[0]
17
Ipd/O
General-Purpose Input/Output Bit 0. (Internal 20k
Pulldown) This pin is a general-
purpose input/output, which can be read or driven via a register bit. This pin is in input
mode after a global reset.
MGNT1
18
O
Master Grant 1 (Active Low). Asserted low when Test Master 1 is the arbitrated
master.
TMREQ1
19
Ipu
Test Master 1 Master Request (Active Low). (Internal 10k
Pullup) When EREQ is
inactive and
TMREQ1 is active, this pin selects the test master port 1 as the master.
When switching
TMREQ1, none of the master clocks should be toggling.
TDI1
20
Ipu/O
Test Master 1 Test Port Serial Data Input
Master Mode = Input
Slave Mode = Output
When PREN = VDD, an internal 10k pullup resistor is connected to this pin.
TDO1
21
I/O
Test Master 1 Test Port Serial Data Out
Master Mode = Output
Slave Mode = Input
When PREN = VDD, an internal 10k pullup resistor is connected to this pin.
TCK1
22
Ipd/O
Test Master 1 Test Port Clock
Master Mode = Input
Slave Mode = Output
When PREN = VDD, an internal 20k pulldown resistor is connected to this pin.
TRST1
23
Ipu / O
Test Master 1 Test Port Test Reset (Active Low). Asserting this pin low (when
master) puts the DS26900 into configuration mode, allowing access to the Switch
TAP Controller. Toggling
TRST1 when not the arbitrated master has no effect. This
pin does not directly affect secondary port resets.
Master Mode =
TRST1 Input
Slave Mode =
TRST1 Output
When PREN = VDD, an internal 10k pullup resistor is connected to this pin.
TMS1
24
Ipd/O
Test Master 1 Test Port Test Mode Select
Master Mode = Input
Slave Mode = Output
When PREN = VDD, an internal 20k pulldown resistor is connected to this pin.
MGNT2
25
O
Master Grant 2 (Active Low). Asserted low when Test Master 2 is the arbitrated
master.
VSS
26, 48,
108, 133
P
Ground Reference. All VSS signals should be tied together.
TMREQ2
27
Ipu
Test Master 2 Master Request (Active Low). (Internal 10k
Pullup) When EREQ
and
TMREQ1 are inactive and TMREQ2 is active, this pin selects the test master
port 2 as the master. When switching
TMREQ2, none of the master clocks should be
toggling.
TDI2
28
Ipu/O
Test Master 2 Test Port Serial Data Input
Master Mode = Input
Slave Mode = Output
When PREN = VDD, an internal 10k pullup resistor is connected to this pin.
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參數(shù)描述
DS26900LN+ 功能描述:多路器開(kāi)關(guān) IC JTAG MUX RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開(kāi)關(guān)數(shù)量:4 開(kāi)啟電阻（最大值）:7 Ohms 開(kāi)啟時(shí)間（最大值）: 關(guān)閉時(shí)間（最大值）: 傳播延遲時(shí)間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16
DS26900N+ 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:JTAG Multiplexer/Switch
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