參數(shù)資料
型號: DS2490S
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: Bus Controller
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PDSO24
封裝: 0.300 INCH, SO-24
文件頁數(shù): 15/51頁
文件大?。?/td> 444K
代理商: DS2490S
DS2490
22 of 50
BYTE I/O—This command accomplishes a direct 1-Wire write and read with optional strong pullup
after the last bit of the byte. The optional strong pullup is controlled using embedded command bit SPU.
For a write sequence, the data byte to be written is included in the command setup packet as shown in
Appendix 2. For a read sequence, the setup packet data byte value is set to 0xFF. Data is returned to the
host only if the embedded command bit ICP = 0. If ICP = 0, the byte read from the 1-Wire device is
stored in the EP3 FIFO and is read by the host using an EP3 bulk transaction.
Command parameters:
1 byte: Data byte to be sent to the 1-Wire bus. To read only, the byte
should be 0xFF.
EP2 data:
None, this command gets its input data as a command parameter.
EP3 data:
Length
Description
If ICP = 0: 1 byte
Byte read back from the 1-Wire device.
If ICP = 1: None
No data is returned.
Result Register:
If ICP = 1: no result data is generated.
If ICP = 0 and NTF = 1: a result value of 0x00 will be generated.
If IPC = 0 and NTF = 0: no result data is generated since there are no
error codes associated with this command.
BLOCK I/O—This command accomplishes a direct 1-Wire write or read with optional strong pullup
after the last byte of the block. The optional strong pullup is controlled using embedded command bit
SPU. Embedded command bit RST enables a 1-Wire reset before the command executes. To accomplish
a READ function all input data should be 0xFF, otherwise the data read from the 1-Wire bus will be
masked. For a block write sequence the EP2 FIFO must be pre-filled with data before command
execution. Additionally, for block sizes greater then the FIFO size, the FIFO content status must be
monitored by host SW so that additional data can be sent to the FIFO when necessary. A similar EP3
FIFO content monitoring requirement exists for block read sequences. During a block read the number of
bytes loaded into the EP3 FIFO must be monitored so that the data can be read before the FIFO
overflows.
Command parameters:
2 bytes specifying block size.
EP2 data:
Length
Description
Same as block
size
Data block to be written to the 1-Wire device.
EP3 data:
Length
Description
Same as block
size
Data block read from the 1-Wire device.
Result Register:
If ICP = 1: no result data is generated.
If ICP = 0 and NTF = 1: a result value of 0x00 will be generated.
If IPC = 0 and NTF = 0: no result data is generated since there are no
error codes associated with this command.
MATCH ACCESS—This command is used to address a device on the active section of the 1-Wire bus
using the Match ROM or Overdrive Match command code. The EP2 FIFO must be pre-filled with the 8
bytes target ROM ID before command execution. Embedded command bit RST enables a 1-Wire reset
before the command executes, and embedded command bit SE enables a 1-Wire speed change that takes
effect before the command executes.
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