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參數(shù)資料
| 型號(hào)： | DS2480B+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 9/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LINE DRVR W/SENSOR 1-W 8SOIC |
| 產(chǎn)品培訓(xùn)模塊： | 1-Wire Communications Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
| 其它名稱： | DS2480B+T&RDKR |
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DS2480B
Maxim Integrated........................................................................................................................................................................................... 17
A Write-1 and Read Data time slot is comprised of the segments tLOW1, tDSO and tHIGH. During Write-1
time slots, after the Write-1 low time tLOW1 is over, the DS2480B waits for the duration of the data sample
offset and then samples the voltage at the 1-Wire bus to read the response. After this, the waiting time
tHIGH1 must expire before the time slot is complete. A Write-0 time slot only consists of the two segments
tLOW0 and tREC0.
If the network is large or heavily loaded, one should select flexible speed and extend tLOW1 to more than
8s to allow the 1-Wire bus to completely discharge. Since a large or heavily loaded network needs more
time to recharge, it is also recommended to delay sampling the bus for reading. A higher value for tDSO
will increase the voltage margin and also provide extra energy to the slave devices when generating a
long series of write 0 time slots. However, the total of tLOW1 + tDSO should not exceed 22s*. Otherwise
the slave device responding may have stopped pulling the bus low when transmitting a logic 0.
The idle time between time slots within a byte or during a 12-bit sequence while the Search Accelerator is
on is 0. Between bytes, 12-bit search sequences and single bits the idle time depends on the RS232 data
rate and the host’s response time. The response byte is sent to the host as soon as the last time slot of a
byte, 12-bit sequence or the command is completed.
Figure 6b. WRITE-1 AND READ DATA TIME SLOT
Speed
tLOW1
tDSO
tHIGH1
tSLOT*
Standard
8s
3s
49s
60s
Overdrive
1s
8s
10s
Flexible
8s to 15s
3s to 10s
49s
60s to 74s
Figure 6c. WRITE-0 TIME SLOT
Speed
tLOW0
tREC0
tSLOT*
Standard
57s
3s
60s
Overdrive
7s
3s
10s
Flexible
57s
3s to 10s
60s to 67s
*In a 5V environment (±1V, full temperature range) the tolerance of the internal time base of 1-Wire
slave devices is much narrower than what it is when operated at the minimum voltage of 2.8V. Therefore,
the timing generated by the DS2480B is in compliance with the requirements of all 1-Wire/iButton 1-
Wire devices.
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相關(guān)代理商/技術(shù)參數(shù) |
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| DS2480S | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Serial 1.Wire Line Driver |
| DS2482-100 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Single-Channel 1-Wire Master |
| DS2482-100_12 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single-Channel 1-Wire Master |
| DS2482-101 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single-Channel 1-Wire Master with Sleep Mode |
| DS2482-101_12 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single-Channel 1-Wire Master with Sleep Mode |
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