參數(shù)資料
型號(hào): DS21Q44T+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 55/105頁(yè)
文件大?。?/td> 0K
描述: IC FRAMER ENHANCED E1 4X 128TQFP
標(biāo)準(zhǔn)包裝: 72
控制器類型: E1 調(diào)幀器
接口: 并行/串行
電源電壓: 2.97 V ~ 3.63 V
電流 - 電源: 75mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應(yīng)商設(shè)備封裝: 128-LQFP(14x20)
包裝: 管件
DS21Q44
53 of 105
RCC1/RCC2/RCC3/RCC4: RECEIVE CHANNEL CONTROL REGISTER
(Address = A4 to A7 Hex)
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
RCC1 (A4)
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
RCC2 (A5)
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
RCC3 (A6)
CH32
CH31
CH30
CH29
CH28
CH27
CH26
CH25
RCC4 (A7)
SYMBOL
POSITION
NAME AND DESCRIPTION
CH1 - 32
RCC1.0 - 4.7
Receive Code Insertion Control Bits
0 = do not insert data from the RC register into the receive data
stream
1 = insert data from the RC register into the receive data stream
12. CLOCK BLOCKING REGISTERS
The Receive Channel blocking Registers (RCBR1 / RCBR2 / RCBR3 / RCBR4) and the Transmit
Channel Blocking Registers (TCBR1 / TCBR2 / TCBR3 / TCBR4) control RCHBLK and TCHBLK pins
respectively. (The RCHBLK and TCHBLK pins are user programmable outputs that can be forced either
high or low during individual channels). These outputs can be used to block clocks to a USART or
LAPD controller in ISDN–PRI applications. When the appropriate bits are set to a one, the RCHBLK
and TCHBLK pin will be held high during the entire corresponding channel time. See the timing in
Section 18 for an example. The TCBRs have alternate mode of use. Via the CCR3.6 bit, the user has the
option to use the TCBRs to determine on a channel by channel basis, which signaling bits are to be
inserted via the TSRs (the corresponding bit in the TCBRs=1) and which are to be sourced from the
TSER or TSIG pins (the corresponding bit in the TCBR=0). See the timing in Section 18 for an example.
RCBR1/RCBR2/RCBR3/RCBR4: RECEIVE CHANNEL BLOCKING
REGISTERS (Address=2B to 2E Hex)
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
RCBR1 (2B)
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
RCBR2 (2C)
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
RCBR3 (2D)
CH32
CH31
CH30
CH29
CH28
CH27
CH26
CH25
RCBR4 (2E)
SYMBOLS
POSITIONS
NAME AND DESCRIPTION
CH1 - 32
RCBR1.0 - 4.7
Receive Channel Blocking Control Bits.
0 = force the RCHBLK pin to remain low during this channel
time
1 = force the RCHBLK pin high during this channel time
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