參數(shù)資料
型號(hào): DS21Q44T+
廠(chǎng)商: Maxim Integrated Products
文件頁(yè)數(shù): 15/105頁(yè)
文件大小: 0K
描述: IC FRAMER ENHANCED E1 4X 128TQFP
標(biāo)準(zhǔn)包裝: 72
控制器類(lèi)型: E1 調(diào)幀器
接口: 并行/串行
電源電壓: 2.97 V ~ 3.63 V
電流 - 電源: 75mA
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 128-LQFP
供應(yīng)商設(shè)備封裝: 128-LQFP(14x20)
包裝: 管件
DS21Q44
17 of 105
Signal Name:
RFSYNC
Signal Description:
Receive Frame Sync
Signal Type:
Output
An extracted 8-kHz pulse, one RCLK wide, is output at this pin which identifies frame boundaries.
Signal Name:
RMSYNC
Signal Description:
Receive Multiframe Sync
Signal Type:
Output
An extracted pulse, one RSYSCLK wide, is output at this pin which identifies multiframe boundaries. If
the receive side elastic store is disabled, then this output will output multiframe boundaries associated
with RCLK. This function is available when FMS = 1 (DS21Q43 emulation).
Signal Name:
RSYSCLK
Signal Description:
Receive System Clock
Signal Type:
Input
1.544 MHz or 2.048 MHz clock. Only used when the elastic store function is enabled. Should be tied
low in applications that do not use the elastic store. Can be burst at rates up to 8.192 MHz.
Signal Name:
RSIG
Signal Description:
Receive Signaling Output
Signal Type:
Output
Outputs signaling bits in a PCM format. Updated on rising edges of RCLK when the receive side elastic
store is disabled. Updated on the rising edges of RSYSCLK when the receive side elastic store is
enabled. This function is available when FMS = 0.
Signal Name:
RLOS/LOTC
Signal Description:
Receive Loss of Sync / Loss of Transmit Clock
Signal Type:
Output
A dual function output that is controlled by the TCR2.0 control bit. This pin can be programmed to either
toggle high when the synchronizer is searching for the frame and multiframe or to toggle high if the
TCLK pin has not been toggled for 5 usec. This function is available when FMS = 1 (DS21Q43
emulation).
Signal Name:
CLKSI
Signal Description:
8 MHz Clock Reference
Signal Type:
Input
A 2.048 MHz reference clock used in the generation of 8MCLK. This function is available when
FMS = 0.
Signal Name:
8MCLK
Signal Description:
8 MHz Clock
Signal Type:
Output
A 8.192 MHz output clock that is referenced to the clock that is input at the CLKSI pin. This function is
available when FMS = 0.
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