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參數(shù)資料
| 型號： | DS1963L-F5 |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Memory IC:Other |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, MEDB2 |
| 封裝： | MICROCAN-2 |
| 文件頁數(shù)： | 20/24頁 |
| 文件大?。?/td> | 482K |
| 代理商： | DS1963L-F5 |
DS1963L
5 of 24
MEMORY
The memory map in Figure 5 shows a 32-byte page called the scratchpad and additional 32-byte pages
called memory. The DS1963L contains pages 0 through 15 which make up the 4096-bit SRAM. The
scratchpad is an additional page that acts as a buffer when writing to memory.
ADDRESS REGISTERS AND TRANSFER STATUS
Because of the serial data transfer, the DS1963L employs three address registers, called TA1, TA2 and
E/S (Figure 6). Registers TA1 and TA2 must be loaded with the target address to which the data will be
written or from which data will be sent to the master upon a Read command. Register E/S acts like a byte
counter and Transfer Status register. It is used to verify data integrity with write commands. Therefore,
the master only has read access to this register. The lower 5 bits of the E/S register indicate the address of
the last byte that has been written to the scratchpad. This address is called Ending Offset. Bit 5 of the E/S
register, called PF or “partial byte flag,” is set if the number of data bits sent by the master is not an
integer multiple of 8. Bit 6 has no function; it always reads 0. Note that the lowest 5 bits of the target
address also determine the address within the scratchpad, where intermediate storage of data will begin.
This address is called byte offset. If the target address (TA1) for a Write command is 03CH for example,
then the scratchpad will store incoming data beginning at the byte offset 1CH and will be full after only
four bytes. The corresponding ending offset in this example is 1FH. For best economy of speed and
efficiency, the target address for writing should point to the beginning of a new page; i.e., the byte offset
will be 0. Thus the full 32-byte capacity of the scratchpad is available, resulting also in the ending offset
of 1FH. However, it is possible to write one or several contiguous bytes somewhere within a page. The
ending offset together with the Partial Flag support the master checking the data integrity after a Write
command. The highest valued bit of the E/S register, called AA or Authorization Accepted, acts as a flag
to indicate that the data stored in the scratchpad has already been copied to the target memory address.
Writing data to the scratchpad clears this flag.
WRITING WITH VERIFICATION
To write data to the DS1963L, the scratchpad has to be used as intermediate storage. First the master
issues the Write Scratchpad command to specify the desired target address, followed by the data to be
written to the scratchpad. Under certain conditions (see Write Scratchpad command) the master will
receive an inverted CRC16 of the command, address and data at the end of the write scratchpad command
sequence. Knowing this CRC value, the master can compare it to the value it has calculated itself to
decide if the communication was successful and proceed to the Copy Scratchpad command. If the master
could not receive the CRC16, it has to send the Read Scratchpad command to read back the scratchpad to
verify data integrity. As preamble to the scratchpad data, the DS1963L repeats the target address TA1
and TA2 and sends the contents of the E/S register. If the PF flag is set, data did not arrive correctly in the
scratchpad. The master does not need to continue reading; it can start a new trial to write data to the
scratchpad. Similarly, a set AA flag indicates that the Write command was not recognized by the iButton.
If everything went correctly, both flags are cleared and the ending offset indicates the address of the last
byte written to the scratchpad. Now the master can continue reading and verifying every data byte. After
the master has verified the data, it has to send the Copy Scratchpad command. This command must be
followed exactly by the data of the three address registers TA1, TA2 and E/S. The master may obtain the
contents of these registers by reading the scratchpad or derive it from the target address and the amount of
data to be written. As soon as the DS1963L has received these bytes correctly, it will copy the data to the
requested location beginning at the target address.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS1963L-F5+ | 功能描述:iButton RoHS:否 存儲類型:SRAM 存儲容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated |
| DS1963L-F5+W | 功能描述:iButton RoHS:否 存儲類型:SRAM 存儲容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated |
| DS1963R-F5+ | 制造商:Maxim Integrated Products 功能描述:- Rail/Tube |
| DS1963S | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:SHA iButton |
| DS1963S+F5 | 制造商:Maxim Integrated Products 功能描述:SHA IBTN 8SOIC - Rail/Tube |
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