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參數(shù)資料
| 型號： | DS1318E+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 3/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC COUNTER ELAPSED TIME 24-TSSOP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 62 |
| 類型： | 耗用時間計數(shù)器 |
| 特點： | 警報器，方波輸出 |
| 時間格式： | 二進制 |
| 數(shù)據(jù)格式： | 二進制 |
| 接口： | 并聯(lián) |
| 電源電壓： | 3 V ~ 3.6 V |
| 電壓 - 電源，電池： | 1.6 V ~ 3.7 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 24-TSSOP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1433 (CN2011-ZH PDF) |
Special-Purpose Registers
The DS1318 has three additional registers (control A,
control B, and status) that control the clock, alarms,
square wave, and interrupt output. The subseconds0
register has a square-wave synchronization (SQWS) bit
in the bit 0 location. Writing the SQWS bit to 1 clears
the square-wave prescaler and holds it in reset. Only
the frequencies below 4096Hz are reset. Writing the bit
back to 0 takes the prescaler out of reset and starts the
square wave running.
Bit 7: Transfer Enable (TE). When TE is set to logic 1,
the DS1318 continues to update the user copy of the
time value as it receives 4,096Hz clock pulses from the
oscillator. To ensure reading valid time data from the
part, the user should set TE to logic 0 before reading
registers 00–05h. TE must be enabled (logic 1) for at
least 244s to ensure that a transfer occurs. Note that
because of the 244s restriction, sequential values of
the subseconds0 register cannot be read when TE
is used.
It is possible that TE could be set to logic 0 while a
transfer is taking place. In that case, the buffered data
could be invalid. To prevent this, the UIP bit, described
later, should be used. To write data to the clock regis-
ters, the user should set TE to logic 0, write the regis-
ters, and set TE to logic 1.
Bit 6: Enable Oscillator (ENOSC). When ENOSC is set
to logic 1, the DS1318 crystal oscillator becomes
enabled. Actual startup time for the oscillator depends on
many external variables and is not a specified parameter.
Bits 5, 4: Clock Configuration 1, 0 (CCFG1, CCFG0).
These bits determine which of the four possible modes
the DS1318 uses to clock its timekeeping registers:
Bit 3: External Polarity (EPOL). This bit controls the
polarity on the EXT pin input when the CCFG1 and
CCFG0 bits are equal to 0 and 1, respectively. When
EPOL is set to logic 1, the registers count when the EXT
pin is 1. When EPOL is set to logic 0, the registers
count when the EXT pin is logic 0.
Bit 2: Square-Wave Enable (SQWE). When SQWE is
set to logic 1, a frequency determined by the SRSx bits
in control register B (0Bh) is output on the SQW pin.
When SQWE is logic 0, the SQW pin is always 0. When
the part is in power-fail, the SQW pin is always high-
impedance. The square-wave output uses a separate
prescaler from the one used by PF, IRQ, UIP, and the
up counter. The SQWS bit in control register A can be
used to synchronize the square-wave output to within
244s of the other events.
Bit 1: Periodic Interrupt Enable (PIE). When PIE is set
to logic 1, the DS1318 sets the IRQ pin low whenever
the PF flag is set to 1. When PIE is 0, the PF flag does
not affect the IRQ pin.
Bit 0: Alarm Interrupt Enable (AIE). When AIE is set to
logic 1, the DS1318 sets the IRQ pin low whenever the
ALMF flag is set to 1. When AIE is 0, the ALMF flag
does not affect the IRQ pin.
DS1318
Parallel-Interface Elapsed Time Counter
____________________________________________________________________
11
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
TE
ENOSC
CCFG1
CCFG0
EPOL
SQWE
PIE
AIE
Control Register A (0Ah)
CCFG1
CCFG0
MODE
0
Always clocks the registers (normal mode)
01
Clocks when the EXT pin is “active” and
VCC is greater than VPF (event-timer mode,
depends on EPOL bit)
10
Clocks registers when part is running on
VCC
11
Clocks registers when part is running on
VBAT
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS1318E/GG8 | 制造商:Maxim Integrated Products 功能描述:44 BIT PARALLEL INTFACE ETC 24P TSS - Rail/Tube |
| DS1318E+ | 功能描述:實時時鐘 Parallel-Interface Elapsed Time Cntr RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1318E+T&R | 制造商:Maxim Integrated Products 功能描述:44 BIT PRLLEL INTFC ETC TRL LF - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC COUNTER ELAPSED TIME 24TSSOP |
| DS1318E+T&R | 功能描述:實時時鐘 PARALLEL-INTERFACE ELAPSED TIME COUNTER RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS13-1Y | 功能描述:固態(tài)繼電器-工業(yè)安裝 RoHS:否 制造商:Crydom 控制電壓范圍:4 VDC to 32 VDC 負載電壓額定值:7 VDC to 72 VDC 負載電流額定值:160 A 觸點形式: 輸出設備:SSR 安裝風格:Panel |
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