參數(shù)資料
型號(hào): DP83848CVV/NOPB
廠商: National Semiconductor
文件頁(yè)數(shù): 51/86頁(yè)
文件大?。?/td> 0K
描述: IC TXRX ETHERNET PHYTER 48-LQFP
產(chǎn)品培訓(xùn)模塊: PHYTER® Family
標(biāo)準(zhǔn)包裝: 250
類型: 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: 以太網(wǎng)
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 1276 (CN2011-ZH PDF)
配用: DP83848C-POE-EK-ND - BOARD EVALUATION DP83848C
DP83848C-MAU-EK-ND - BOARD EVALUATION DP83848C
其它名稱: *DP83848CVV
*DP83848CVV/NOPB
DP83848CVV
DP83848CVVNOPB
DP83848CVVNOPB-ND
DP83848CVVNOPBTR
DP83848CVVNOPBTR-ND
www.national.com
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7.2.4 False Carrier Sense Counter Register (FCSCR)
This counter provides information required to implement the “False Carriers” attribute within the MAU managed object
class of Clause 30 of the IEEE 802.3u specification.
7.2.5 Receiver Error Counter Register (RECR)
This counter provides information required to implement the “Symbol Error During Carrier” attribute within the PHY man-
aged object class of Clause 30 of the IEEE 802.3u specification.
Table 24. False Carrier Sense Counter Register (FCSCR), address 0x14
Bit
Bit Name
Default
Description
15:8
RESERVED
0, RO
RESERVED: Writes ignored, Read as 0
7:0
FCSCNT[7:0]
0, RO / COR
False Carrier Event Counter:
This 8-bit counter increments on every false carrier event. This
counter sticks when it reaches its max count (FFh).
Table 25. Receiver Error Counter Register (RECR), address 0x15
Bit
Bit Name
Default
Description
15:8
RESERVED
0, RO
RESERVED: Writes ignored, Read as 0
7:0
RXERCNT[7:0]
0, RO / COR
RX_ER Counter:
When a valid carrier is present and there is at least one occurrence
of an invalid data symbol, this 8-bit counter increments for each re-
ceive error detected. This event can increment only once per valid
carrier event. If a collision is present, the attribute will not incre-
ment. The counter sticks when it reaches its max count.
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