參數(shù)資料
型號: DC570A
廠商: Linear Technology
文件頁數(shù): 19/28頁
文件大?。?/td> 0K
描述: BOARD DELTA SIGMA ADC LTC2440
軟件下載: QuikEval System
設(shè)計(jì)資源: DC570A Design File
DC570A Schematic
標(biāo)準(zhǔn)包裝: 1
系列: QuikEval™
ADC 的數(shù)量: 2
位數(shù): 24
采樣率(每秒): 3.5k
數(shù)據(jù)接口: MICROWIRE?,串行,SPI?
工作溫度: 0°C ~ 70°C
已用 IC / 零件: LTC2440
已供物品:
相關(guān)產(chǎn)品: LTC2440CGN#TRPBF-ND - IC ADC DIFFER 24-BIT HS 16-SSOP
LTC2440IGN#TRPBF-ND - IC ADC DIFFER 24-BIT HS 16-SSOP
LTC2440IGN#PBF-ND - IC ADC DIFFER 24-BIT HS 16-SSOP
LTC2440CGN#PBF-ND - IC ADC DIFFER 24-BIT HS 16-SSOP
LTC2440IGN#TR-ND - IC CONV A/D 24-BIT DIFF 16-SSOP
LTC2440CGN#TR-ND - IC CONV A/D 24-BIT DIFF 16-SSOP
LTC2440IGN-ND - IC ADC DIFFER 24-BIT HS 16-SSOP
LTC2440CGN-ND - IC ADC DIFFER 24-BIT HS 16-SSOP
LTC2440
26
2440fd
Example:
If an amplier (e.g. LT1219) driving the input of an LTC2440
has wideband noise of 33nV/√Hz, band-limited to 1.8MHz,
the total noise entering the ADC input is:
33nV/√Hz √1.8MHz = 44.3μV.
When the ADC digitizes the input, its digital lter lters
out the wideband noise from the input signal. The noise
reduction depends on the oversample ratio which denes
the effective bandwidth of the digital lter.
At an oversample of 256, the noise bandwidth of the ADC
is 787Hz which reduces the total amplier noise to:
33nV/√Hz √787Hz = 0.93μV.
The total noise is the RMS sum of this noise with the 2μV
noise of the ADC at OSR=256.
√0.93μ/V2 + 2μV2 = 2.2μV.
Increasing the oversampling ratio to 32768 reduces the
noise bandwidth of the ADC to 6.2Hz which reduces the
total amplier noise to:
33nV/√Hz √6.2Hz = 82nV.
The total noise is the RMS sum of this noise with the
200nV noise of the ADC at OSR = 32768.
√82nV2 + 2μV2 = 216nV.
In this way, the digital lter with its variable oversampling
ratio can greatly reduce the effects of external noise
sources.
Using Non-Autozeroed Ampliers for Lowest Noise
Applications
Ultralow noise applications may require the use of low
noise bipolar ampliers that are not autozeroed. Because
the LTC2440 has such exceptionally low offset, offset drift
and 1/f noise, the offset drift and 1/f noise in the ampli-
ers may need to be compensated for to retain the system
performance of which the ADC is capable.
The circuit of Figure 23 uses low noise bipolar ampliers
and correlated double sampling to achieve a resolution of
14nV, or 19 effective bits over a 10mV span. Each measure-
ment is the difference between two ADC readings taken
with opposite polarity bridge excitation. This cancels 1/f
noise below 3.4Hz and eliminates errors due to parasitic
thermocouples. Allow 750μs settling time after switching
excitation polarity.
APPLICATIONS INFORMATION
相關(guān)PDF資料
PDF描述
DC1012A-A BOARD DELTA SIGMA ADC LTC2499
DC1010A-A BOARD DELTA SIGMA ADC LTC2493
RCM15DCAH-S189 CONN EDGECARD 30POS R/A .156 SLD
ECC31DJCN CONN EDGECARD 62PS .100 PRESSFIT
DEMO9S08QB8 BOARD DEMO FOR 9S08 QB MCU
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DC57-10G-5PN 制造商:Conesys 功能描述:CONN 26482 CIRC PIN 5 POS CRMP ST CBL MNT - Bulk
DC57-12J12PN 制造商:Conesys 功能描述:CONN 26482 CIRC PIN 12 POS CRMP ST CBL MNT - Bulk
DC57-14-04PN 制造商:Conesys 功能描述:CONN 26482 CIRC PIN 4 POS CRMP ST CBL MNT - Bulk
DC57-14-04PN-CO 制造商:Conesys 功能描述:CONN 26482 CIRC PIN 4 POS CRMP ST CBL MNT - Bulk
DC57-18G31PN 制造商:Conesys 功能描述:CONN 26482 CIRC PIN 31 POS CRMP ST CBL MNT - Bulk