參數(shù)資料
型號(hào): DAC1405D650HW
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Dual 14-bit DAC, up to 650 Msps; 2x 4x and 8x interpolating
封裝: DAC1405D650HW/C1<SOT638-1 (HTQFP100)|<<http://www.nxp.com/packages/SOT638-1.html<1<Always Pb-free,;DAC1405D650HW/C1<SOT638-1 (HTQFP100)|<<http://www.nxp.com/packages/SOT6
文件頁數(shù): 28/45頁
文件大小: 1033K
代理商: DAC1405D650HW
DAC1405D650
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 3 — 10 September 2010
28 of 45
NXP Semiconductors
DAC1405D650
Dual 14-bit DAC, up to 650 Msps; 2
×
, 4
×
and 8
×
interpolating
Table 34.
First interpolation filter
Lower
H(1)
H(2)
H(3)
H(4)
H(5)
10.9 DAC transfer function
The full-scale output current for each DAC is the sum of the two complementary current
outputs:
(3)
The output current depends on the digital input data:
(4)
(5)
The setting applied to CODING (register 00h[2]; see
Table 9 “Register allocation map”
)
defines whether the DAC1405D650 operates with a binary input or a two’s complement
input.
Table 35 “DAC transfer function”
shows the output current as a function of the input data,
when I
O(fs)
= 20 mA.
Table 35.
Data
10.10 Full-scale current
10.10.1
Regulation
The DAC1405D650 reference circuitry integrates an internal bandgap reference voltage
which delivers a 1.25 V reference to the GAPOUT pin. It is recommended to decouple pin
GAPOUT using a 100 nF capacitor.
Inversion filter coefficients
Upper
H(9)
H(8)
H(7)
H(6)
-
Value
2
4
10
35
401
DAC transfer function
I13/Q13 to I0/Q0
Binary
00 0000 0000 0000
...
10 0000 0000 0000
...
11 1111 1111 1111
IOUTP
IOUTN
Two’s complement
10 0000 0000 0000
...
00 0000 0000 0000
...
01 1111 1111 1111
0
...
8192
...
16383
0 mA
...
10 mA
...
20 mA
20 mA
...
10 mA
...
0 mA
I
O fs
I
IOUTP
I
IOUTN
+
=
I
IOUTP
I
O fs
16383
---------------
×
=
I
IOUTN
I
O fs
------------------------------------
16383
×
=
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