參數(shù)資料
型號: DAC1005D750HW
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Dual 10-bit DAC, up to 750 Msps; 2x 4x and 8x interpolating
封裝: DAC1005D750HW/C1<SOT638-1 (HTQFP100)|<<http://www.nxp.com/packages/SOT638-1.html<1<Always Pb-free,;DAC1005D750HW/C1<SOT638-1 (HTQFP100)|<<http://www.nxp.com/packages/SOT6
文件頁數(shù): 21/42頁
文件大?。?/td> 353K
代理商: DAC1005D750HW
DAC1005D750
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 7 June 2011
21 of 42
NXP Semiconductors
DAC1005D750
Dual 10-bit DAC, up to 750 Msps; 4x and 8x interpolating
Table 26.
Default settings are shown highlighted.
Bit
Symbol
7
SYNC_DIV
Table 27.
Bit
7 to 0 AUX_A[9:2]
Table 28.
Default settings are shown highlighted.
Bit
Symbol
7
AUX_A_PD
Table 29.
Bit
7 to 0 AUX_B[9:2]
Table 30.
Default settings are shown highlighted.
Bit
Symbol
7
AUX_B_PD
SYNC_Cfg register (address 10h) bit description
Access
R/W
Value
Description
f
s
divided by
4
8
SYNC selection
disabled
enabled
reserved
0
1
6
SYNC_SEL
R/W
0
1
-
5 to 0 -
-
DAC_A_Aux_MSB register (address 1Ah) bit description
Symbol
Access
R/W
Value
-
Description
most significant 8 bits for the auxiliary DAC A
DAC_A_Aux_LSB register (address 1Bh) bit description
Access
R/W
Value
Description
auxiliary DAC A power
on
off
0
1
6 to 1 -
1 to 0 AUX_A[1:0]
-
R/W
-
-
reserved
lower 2 bits for the auxiliary DAC A
DAC_B_Aux_MSB register (address 1Ch) bit description
Symbol
Access
R/W
Value
-
Description
most significant 8 bits for the auxiliary DAC B
DAC_B_Aux_LSB register (address 1Dh) bit description
Access
R/W
Value
Description
auxiliary DAC B power
on
off
reserved
lower 2-bits for the auxiliary DAC B
0
1
-
-
6 to 1
1 to 0
-
AUX_B[1:0]
-
R/W
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