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參數資料
| 型號： | CY7C0832V-167AXC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 256K X 18 DUAL-PORT SRAM, 4 ns, PQFP120 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, LEAD FREE, TQFP-120 |
| 文件頁數： | 8/32頁 |
| 文件大小： | 895K |
| 代理商： | CY7C0832V-167AXC |
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CY7C0851V/CY7C0852V
CY7C0831V/CY7C0832V
Document #: 38-06059 Rev. *I
Page 16 of 32
Maximum Ratings [16]
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ................................ –65
°C to + 150°C
Ambient Temperature with
Power Applied............................................–55
°C to + 125°C
Supply Voltage to Ground Potential .............. –0.5V to + 4.6V
DC Voltage Applied to
Outputs in High-Z State..........................–0.5V to VDD + 0.5V
DC Input Voltage .............................. –0.5V to VDD + 0.5V[17]
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage........................................... > 2000V
(JEDEC JESD22-A114-2000B)
Latch-up Current..................................................... > 200 mA
Operating Range
Range
Ambient Temperature
VDD
Commercial
0
°C to +70°C
3.3V ± 165 mV
Industrial
–40
°C to +85°C
3.3V ± 165 mV
Electrical Characteristics Over the Operating Range
Parameter
Description
-167
-133
Unit
Min. Typ. Max. Min. Typ. Max.
VOH
Output HIGH Voltage
(VDD = Min., IOH= –4.0 mA)
2.4
V
VOL
Output LOW Voltage
(VDD = Min., IOL= +4.0 mA)
0.4
V
VIH
Input HIGH Voltage
2.0
V
VIL
Input LOW Voltage
0.8
V
IOZ
Output Leakage Current
–10
10
–10
10
A
IIX1
Input Leakage Current Except TDI, TMS, MRST
–10
10
–10
10
A
IIX2
Input Leakage Current TDI, TMS, MRST
–0.1
1.0
–0.1
1.0
mA
ICC
Operating Current
(VDD = Max.,IOUT = 0 mA), Outputs Disabled
225
300
225
300
mA
ISB1
Standby Current
(Both Ports TTL Level)
CEL and CER ≥ VIH, f = fMAX
90
115
90
115
mA
ISB2
Standby Current
(One Port TTL Level)
CEL | CER ≥ VIH, f = fMAX
160
210
160
210
mA
ISB3[13]
Standby Current
(Both Ports CMOS Level)
CEL and CER ≥ VDD – 0.2V, f = 0
55
75
55
75
mA
ISB4
Standby Current
(One Port CMOS Level)
CEL | CER ≥ VIH, f = fMAX
160
210
160
210
mA
Capacitance
Parameter
Description
Test Conditions
Max.
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz,
VDD = 3.3V
13
pF
COUT
Output Capacitance
10
pF
Note:
16. The voltage on any input or I/O pin can not exceed the power pin during power-up.
17. Pulse width < 20 ns.
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