參數(shù)資料
型號(hào): COP8CCR9KMT8
廠商: National Semiconductor
文件頁(yè)數(shù): 97/111頁(yè)
文件大?。?/td> 0K
描述: IC MCU EEPROM 8BIT 32K 56-TSSOP
標(biāo)準(zhǔn)包裝: 34
系列: COP8™ 8C
核心處理器: COP8
芯體尺寸: 8-位
速度: 20MHz
連通性: Microwire/Plus(SPI),UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 49
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 56-TFSOP(0.240",6.10mm 寬)
包裝: 管件
其它名稱: *COP8CCR9KMT8
SNOS535I – OCTOBER 2000 – REVISED MARCH 2013
The user must set the BUSY flag immediately upon entering the Slave mode. This ensures that all data
bits sent by the Master is shifted properly. After eight clock pulses the BUSY flag is clear, the shift clock is
stopped, and the sequence may be repeated.
Figure 5-26. MICROWIRE/PLUS Application
5.17.1.2.1 Alternate SK Phase Operation and SK Idle Polarity
The device allows either the normal SK clock or an alternate phase SK clock to shift data in and out of the
SIO register. In both the modes the SK idle polarity can be either high or low. The polarity is selected by
bit 5 of Port G data register. In the normal mode data is shifted in on the rising edge of the SK clock and
the data is shifted out on the falling edge of the SK clock. The SIO register is shifted on each falling edge
of the SK clock. In the alternate SK phase operation, data is shifted in on the falling edge of the SK clock
and shifted out on the rising edge of the SK clock. Bit 6 of Port G configuration register selects the SK
edge.
A control flag, SKSEL, allows either the normal SK clock or the alternate SK clock to be selected. Refer to
Table 5-31 for the appropriate setting of the SKSEL bit. The SKSEL is mapped into the G6 configuration
bit. The SKSEL flag will power up in the reset condition, selecting the normal SK signal provided the SK
Idle Polarity remains LOW.
Table 5-31. MICROWIRE/PLUS Shift Clock Polarity and Sample/Shift Phase
Port G
SK Phase
SO Clocked Out On:
SI Sampled On:
SK Idle Phase
G6 (SKSEL)
G5 Data Bit
Config. Bit
Normal
0
SK Falling Edge
SK Rising Edge
Low
Alternate
1
0
SK Rising Edge
SK Falling Edge
Low
Alternate
0
1
SK Rising Edge
SK Falling Edge
High
Normal
1
SK Falling Edge
SK Rising Edge
High
86
Functional Description
Copyright 2000–2013, Texas Instruments Incorporated
Product Folder Links: COP8CBR9 COP8CCR9 COP8CDR9
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