- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1908 > COP8CCR9KMT8 (National Semiconductor)IC MCU EEPROM 8BIT 32K 56-TSSOP PDF資料下載
參數(shù)資料
| 型號(hào)： | COP8CCR9KMT8 |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 92/111頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU EEPROM 8BIT 32K 56-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 34 |
| 系列： | COP8™ 8C |
| 核心處理器： | COP8 |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 連通性： | Microwire/Plus（SPI），UART/USART |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 49 |
| 程序存儲(chǔ)器容量： | 32KB（32K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 16x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 56-TFSOP（0.240"，6.10mm 寬） |
| 包裝： | 管件 |
| 其它名稱： | *COP8CCR9KMT8 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁當(dāng)前第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁
SNOS535I – OCTOBER 2000 – REVISED MARCH 2013
should return to execute the VIS instruction. This is particularly useful when exiting long interrupt
service routines if the time between interrupts is short. In this case the RETI instruction would only be
executed when the default VIS routine is reached.
3. While executing from the Boot ROM for ISP or virtual E2 operations, the hardware will disable
interrupts from occurring. The hardware will leave the GIE bit in its current state, and if set, the
hardware interrupts will occur when execution is returned to Flash Memory. Subsequent interrupts,
during ISP operation, from the same interrupt source will be lost.
5.16 WATCHDOG/Clock Monitor
The devices contain a user selectable WATCHDOG and clock monitor. The following section is applicable
only if the WATCHDOG feature has been selected in the Option register. The WATCHDOG is designed to
detect the user program getting stuck in infinite loops resulting in loss of program control or “runaway”
programs.
The WATCHDOG logic contains two separate service windows. While the user programmable upper
window selects the WATCHDOG service time, the lower window provides protection against an infinite
program loop that contains the WATCHDOG service instruction. The WATCHDOG uses the Idle Timer
(T0) and thus all times are measured in Idle Timer Clocks.
The Clock Monitor is used to detect the absence of a clock or a very slow clock below a specified rate on
tC.
The WATCHDOG consists of two independent logic blocks: WD UPPER and WD LOWER. WD UPPER
establishes the upper limit on the service window and WD LOWER defines the lower limit of the service
window.
Servicing the WATCHDOG consists of writing a specific value to a WATCHDOG Service Register named
WDSVR which is memory mapped in the RAM. This value is composed of three fields, consisting of a 2-
bit Window Select, a 5-bit Key Data field, and the 1-bit Clock Monitor Select field. Table 5-26 shows the
WDSVR register.
Table 5-26. WATCHDOG Service Register (WDSVR)
Window Select
Key Data
Clock Monitor
X
0
1
0
Y
7
6
5
4
3
2
1
0
The lower limit of the service window is fixed at 2048 Idle Timer Clocks. Bits 7 and 6 of the WDSVR
register allow the user to pick an upper limit of the service window.
Table 5-27 shows the four possible combinations of lower and upper limits for the WATCHDOG service
window. This flexibility in choosing the WATCHDOG service window prevents any undue burden on the
user software.
Bits 5, 4, 3, 2 and 1 of the WDSVR register represent the 5-bit Key Data field. The key data is fixed at
01100. Bit 0 of the WDSVR Register is the Clock Monitor Select bit.
Table 5-27. WATCHDOG Service Window Select
Clock
Service Window
WDSVR
Monitor
for High Speed Mode
for Dual Clock & Low Speed Modes
Bit 7
Bit 6
Bit 0
(Lower-Upper Limits)
0
X
2048-8k tC Cycles
2048-8k Cycles of 32 kHz Clk
0
1
X
2048-16k tC Cycles
2048-16k Cycles of LS 32 kHz Clk
1
0
X
2048-32k tC Cycles
2048-32k Cycles of LS 32 kHz Clk
1
X
2048-64k tC Cycles
2048-64k Cycles of LS 32 kHz Clk
X
0
Clock Monitor Disabled
Copyright 2000–2013, Texas Instruments Incorporated
Functional Description
81
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| COP8SAA716M8/NOPB | IC MCU OTP 8BIT 1K 16-SOIC |
| CP2101-GMR | IC CTRLR BRIDGE USB-UART 28MLP |
| CP2103-GMR | IC CTRLR BRIDGE USB-UART 28MLP |
| CP2104-F03-GM | IC SGL USB-TO-UART BRIDGE 24QFN |
| CP2105-F01-GM | IC SGL USB-DL UART BRIDGE 24QFN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| COP8CCR9LVA7 | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| COP8CCR9LVA7/63 | 制造商:Texas Instruments 功能描述: |
| COP8CCR9LVA7/63SN | 功能描述:閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| COP8CCR9LVA7/NOPB | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| COP8CCR9LVA763SN | 制造商:National Semiconductor 功能描述:MCU 8-bit COP8 CISC 32KB Flash 5V 68-Pin PLCC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。