
User Manual
C166S V2
External Bus Controller
User Manual
6-153
V 1.7, 2001-01
6
External Bus Controller
6.1
Introduction
Although the C166S V2 products provide a powerful set of on-chip peripherals and on-
chip program and data memories, these internal units only cover a small fraction of the
C166S V2
′
s address space of up to 16 MByte. The external bus interface allows access
to external
1)
peripherals and additional volatile and non-volatile memories. The external
bus interface provides a number of configurations, so it can be tailored to fit perfectly into
a given application system.
Accesses to external memories or peripherals are executed by the integrated External
Bus Controller (EBC). The function of the EBC is controlled via a set of configuration
registers. The basic behavior can be programmed via the mode selection registers
EBCMODx.
The EBC supports up to eight external chip select channels. Each of these chip select
signals is programmable via a set of registers. The FCONCSx registers specify the
external bus cycles in terms of address (mux/demux), data (16-bit/8-bit), chip select
enable and READY control. The timing of the bus access is controlled by the timing
configuration registers TCONCSx, which specify the length of the different access
phases. All these parameters are used for accesses within a specific address area which
is defined via the corresponding address select register ADDRSELx.
The seven register sets FCONCS1/TCONCS1/ADDRSEL1 to FCONCS7/TCONCS7/
ADDRSEL7 define seven independent
‘
address windows
’
, while all external accesses
outside these windows are controlled via the registers FCONCS0 and TCONCS0. Two
additional chip select channels with fixed address ranges are defined for the startup and
the monitor memory.
The external bus timing is related to the reference clock output CLKOUT. All bus signals
are generated in relation to the rising edge of this clock. This behavior eases the timing
specification drastically and allows high EBC operating frequencies above 100 MHz. The
external bus protocol is compatible with the C16x ones. However, the external bus timing
is improved in terms of wait state granularity.
Note: For supporting these improvements, an extended configuration scheme
compared to the C16x is defined. The C16x registers SYSCON and BUSCONx
are no longer used. In principle the configuration of the external bus controller is
done during the application initialization. Therefore, only some initialization code
has to be adapted for using the C166S V2 EBC module instead of the C16x
external bus controller.
1)
C166S V2:
’
External
’
means off-chip However, modules like customer ASIC, startup memory and additional
peripherals and memories can be connected on-chip to the external bus module as well. These modules are
from the controller sub-system point of view also external, but on-chip.