參數(shù)資料
型號(hào)： B250W48A106E1G
廠商： ON Semiconductor
文件頁數(shù)： 5/30頁
文件大小： 0K
描述： IC DSP AUDIO 16BIT 48WLCSP
標(biāo)準(zhǔn)包裝： 2,500
系列： BelaSigna® 250
類型： 音頻處理器
應(yīng)用： 便攜式設(shè)備
安裝類型： 表面貼裝
封裝/外殼： 48-VFBGA，WLCSP
供應(yīng)商設(shè)備封裝： 48-WLCSP（3.8x2.58）
包裝： 帶卷 (TR)
BELASIGNA 250
http://onsemi.com
13
Audio Inputs
The audio input traces should be as short as possible. The
input impedance of each audio input pad (e.g., AI0, AI1,
etc.,) is high (approximately 500 k
W); therefore a 10 nF
capacitor is sufficient to decouple the DC bias. This
capacitor and the internal resistance form a firstorder
analog high pass filter whose cutoff frequency can be
calculated by f3dB (Hz) = 1/(R x C x 2π), which results with
~30 Hz for 10 nF capacitor. This 10 nF capacitor value
applies when the preamplifier is being used, in other words,
when a nonunity gain is applied to the signals. When the
preamplifier is bypassed, the impedance is reduced; hence,
the cutoff frequency of the resulting highpass filter could
be too high. In such a case, the use of a 3040 nF serial
capacitor is recommended.
Keep audio input traces strictly away from output traces.
Microphone ground terminals should be connected to the
AGND plane (if present) or share a trace with the input
ground reference voltage pin (AIR) to the star point. Analog
and digital outputs MUST be kept away from microphone
inputs to ensure low noise performance.
Audio Outputs
The audio output traces should be as short as possible. If
the direct digital output is used, the trace length of RCVRx+
and RCVRx should be approximately the same to provide
matched impedances. If the analog audio output is used, the
ground return for the external power amplifier should share
a trace with the output ground reference voltage pin (AOR)
to the star point.
Architecture Overview
Figure 2. BELASIGNA 250 Architecture: A Complete Audio Processing System
RCore DSP
The RCore is a 16bit fixedpoint, dualHarvard
architecture DSP. It includes efficient normalize and
denormalize instructions, and support for double precision
operations to provide the additional dynamic range needed
for many applications. All memory locations in the system
are accessible by the RCore using several addressing modes
including indirect and circular modes. The RCore assumes
master functionality of the system.
RCore DSP Architecture
Figure 3 illustrates the architecture of the RCore.
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