參數(shù)資料
型號(hào): B250W48A106E1G
廠商: ON Semiconductor
文件頁(yè)數(shù): 10/30頁(yè)
文件大小: 0K
描述: IC DSP AUDIO 16BIT 48WLCSP
標(biāo)準(zhǔn)包裝: 2,500
系列: BelaSigna® 250
類型: 音頻處理器
應(yīng)用: 便攜式設(shè)備
安裝類型: 表面貼裝
封裝/外殼: 48-VFBGA,WLCSP
供應(yīng)商設(shè)備封裝: 48-WLCSP(3.8x2.58)
包裝: 帶卷 (TR)
BELASIGNA 250
http://onsemi.com
18
Figure 5. Audio Modes
stereo
Full Stereo Mode
FIFO
WOLA
Coprocessor
*
Synthesis
Analysis
Simple Stereo Mode
stereo
FIFO
WOLA
Coprocessor
*
Synthesis
Analysis
mono
Digital Mixed Mode
Mono Mode
mono
stereo
mono
FIFO
WOLA
Coprocessor
FIFO
WOLA
Coprocessor
*
Synthesis
Analysis
Synthesis
Analysis
* Real & Complex Gain Application
Other Digital Blocks and Functions
RAM and ROM
There are 20Kwords of onchip program and data RAM
on BELASIGNA 250. These are divided into three entities:
a 12Kword program memory, and two 4Kword data
memories (“X” and “Y”, as are common in a dualHarvard
architecture).
There are also three RAM banks that are shared between
the RCore and WOLA coprocessor. These memory banks
contain the input and output FIFOs, gain tables for the
WOLA coprocessor, temporary memory for WOLA
calculations, WOLA coprocessor results, and the WOLA
coprocessor microcode.
There is a 128word lookup table (LUT) ROM that
contains log2(x), 2x, 1/x and sqrt(x) values, and a 1Kword
program ROM that is used during booting and configuration
of the system.
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