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AX88780
9
ASIX ELECTRONICS CORPORATION
2.0 Signal Description
2.1 Signal Type Definition
I3:
I2:
I25
O3:
O2:
IO3:
IO2
TSO:
OD:
PD:
PU:
GND:
VCC3:
VCC2:
I:
O:
IO:
Input, 3.3V with 5V tolerance
Input, 2.5V with 3.3V tolerance
Input, 2.5V only
Output, 3.3V
Output, 2.5V
Input/Output, input 3.3V with 5V tolerance
Input/Output, input 2.5V with 3.3V tolerance
Tri-State Output
Open Drain allows multiple devices to share as a wire-OR
Internal 75K Pull Down
Internal 75K Pull Up
Ground
3.3V power
2.5V power
Input only
Output only
Input/Output
2.2 Host Interface
Table 1 : Host Interface signals group
Pin Name
INTN
Type
TSO, 8mA
Pin NO
102
Pin Description
Interrupt to host system
When the polarity is active high, this signal must be pulled low, otherwise pulled
high in active low environment. Software set the bit6 of command register (CMD) to
response the polarity.
Reset signal: active low.
Reference Clock. This clock may be from host (synchronous mode) or the output of
stand-alone OSC (asynchronous mode).
Wake-up signal to system. When the polarity of system is active high, this signal
must be pulled low, otherwise pulled high in active low environment. Software set
the bit0 of command register (CMD) to response the polarity.
Data bus bit0.
Data bus bit1.
Data bus bit2.
Data bus bit3.
Data bus bit4.
Data bus bit5.
Data bus bit6.
Data bus bit7.
Data bus bit8.
Data bus bit9.
Data bus bit10.
Data bus bit11.
Data bus bit12.
Data bus bit13.
Data bus bit14.
Data bus bit15.
Data bus bit16, internal pull down.
*
Data bus bit17, internal pull down.
*
Data bus bit18, internal pull down.
*
RST_N
HCLK
I3
I3
103
104
WAKEUP
TSO, 8mA
115
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
IO3, 8mA
19
18
17
16
15
14
12
11
10
9
7
6
5
3
2
128
127
126
125